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tu: Refactor FDM sampling and bin merging
With subsampled images, we will have to do a global pass over all of the tiles in the framebuffer in order to determine the coordinates of the subsampled image, we have to know the bin merging state, and we have to remember what we chose so that we can emit the table of bin positions. Create an array of tile configs for all tiles, and move all FDM-related calculation to tu_calc_tile_config(). Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39868>
This commit is contained in:
Connor Abbott
Marge Bot
parent
3d9207a366
commit
5a8ee1a067
1 changed files with 77 additions and 67 deletions
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@ -4001,49 +4001,29 @@ try_merge_tiles(struct tu_tile_config *dst, struct tu_tile_config *src,
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return true;
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}
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template <chip CHIP>
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void
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tu_render_pipe_fdm(struct tu_cmd_buffer *cmd, uint32_t pipe,
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uint32_t tx1, uint32_t ty1, uint32_t tx2, uint32_t ty2,
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const struct tu_image_view *fdm,
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const VkOffset2D *fdm_offsets)
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static void
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tu_merge_tiles(struct tu_cmd_buffer *cmd, const struct tu_vsc_config *vsc,
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struct tu_tile_config *tiles,
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uint32_t tx1, uint32_t ty1, uint32_t tx2, uint32_t ty2)
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{
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uint32_t width = tx2 - tx1;
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uint32_t height = ty2 - ty1;
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unsigned views = tu_fdm_num_layers(cmd);
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bool has_abs_mask =
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cmd->device->physical_device->info->props.has_abs_bin_mask;
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unsigned views = tu_fdm_num_layers(cmd);
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bool shared_viewport = cmd->state.rp.shared_viewport;
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uint32_t width = vsc->tile_count.width;
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struct tu_tile_config tiles[width * height];
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/* Initialize tiles and sample fragment density map */
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for (uint32_t y = 0; y < height; y++) {
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for (uint32_t x = 0; x < width; x++) {
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struct tu_tile_config *tile = &tiles[width * y + x];
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tile->pos = { x + tx1, y + ty1 };
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tile->sysmem_extent = { 1, 1 };
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tile->gmem_extent = { 1, 1 };
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tile->pipe = pipe;
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tile->slot_mask = 1u << (width * y + x);
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tile->merged_tile = NULL;
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tu_calc_bin_visibility(cmd, tile, fdm_offsets);
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tu_calc_frag_area(cmd, tile, fdm, fdm_offsets);
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}
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}
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/* Merge tiles */
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for (uint32_t y = 0; y < height; y++) {
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for (uint32_t x = 0; x < width; x++) {
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struct tu_tile_config *tile = &tiles[width * y + x];
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for (uint32_t y = ty1; y < ty2; y++) {
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for (uint32_t x = tx1; x < tx2; x++) {
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struct tu_tile_config *tile =
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&tiles[width * y + x];
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if (tile->visible_views == 0)
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continue;
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if (x > 0) {
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if (x > tx1) {
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struct tu_tile_config *prev_x_tile = &tiles[width * y + x - 1];
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try_merge_tiles(tile, prev_x_tile, views, has_abs_mask,
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shared_viewport);
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}
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if (y > 0) {
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if (y > ty1) {
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unsigned prev_y_idx = width * (y - 1) + x;
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struct tu_tile_config *prev_y_tile = &tiles[prev_y_idx];
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@ -4057,24 +4037,59 @@ tu_render_pipe_fdm(struct tu_cmd_buffer *cmd, uint32_t pipe,
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}
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}
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}
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}
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/* Finally, iterate over tiles and draw them */
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for (uint32_t y = 0; y < height; y++) {
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for (uint32_t x = 0; x < width; x++) {
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uint32_t tx;
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if (y & 1)
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tx = width - 1 - x;
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else
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tx = x;
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static struct tu_tile_config *
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tu_calc_tile_config(struct tu_cmd_buffer *cmd, const struct tu_vsc_config *vsc,
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const struct tu_image_view *fdm, const VkOffset2D *fdm_offsets)
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{
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struct tu_tile_config *tiles = (struct tu_tile_config *)
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calloc(vsc->tile_count.width * vsc->tile_count.height,
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sizeof(struct tu_tile_config));
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unsigned tile_idx = y * width + tx;
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struct tu_tile_config *tile = &tiles[tile_idx];
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if (tile->merged_tile || tile->visible_views == 0)
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continue;
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for (uint32_t py = 0; py < vsc->pipe_count.height; py++) {
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uint32_t ty1 = py * vsc->pipe0.height;
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uint32_t ty2 = MIN2(ty1 + vsc->pipe0.height, vsc->tile_count.height);
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for (uint32_t px = 0; px < vsc->pipe_count.width; px++) {
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uint32_t tx1 = px * vsc->pipe0.width;
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uint32_t tx2 = MIN2(tx1 + vsc->pipe0.width, vsc->tile_count.width);
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uint32_t pipe_width = tx2 - tx1;
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uint32_t pipe = py * vsc->pipe_count.width + px;
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tu6_render_tile<CHIP>(cmd, &cmd->cs, tile, fdm_offsets);
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/* Initialize tiles and sample fragment density map */
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for (uint32_t y = ty1; y < ty2; y++) {
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for (uint32_t x = tx1; x < tx2; x++) {
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uint32_t tx = x - tx1;
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uint32_t ty = y - ty1;
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struct tu_tile_config *tile = &tiles[vsc->tile_count.width * y + x];
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tile->pos = { x, y };
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tile->sysmem_extent = { 1, 1 };
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tile->gmem_extent = { 1, 1 };
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tile->pipe = pipe;
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tile->slot_mask = 1u << (pipe_width * ty + tx);
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tile->merged_tile = NULL;
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tu_calc_bin_visibility(cmd, tile, fdm_offsets);
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tu_calc_frag_area(cmd, tile, fdm, fdm_offsets);
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}
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}
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/* Merge tiles */
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/* TODO: we should also be able to merge tiles when only
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* per_view_render_areas is used without FDM. That requires using
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* another method to force disable draws since we don't want to force
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* the viewport to be re-emitted, like overriding the view mask. It
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* would also require disabling stores, and adding patchpoints for
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* CmdClearAttachments in secondaries or making it use the view mask.
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*/
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if (!TU_DEBUG(NO_BIN_MERGING) &&
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cmd->device->physical_device->info->props.has_bin_mask) {
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tu_merge_tiles(cmd, vsc, tiles, tx1, ty1, tx2, ty2);
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}
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}
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}
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return tiles;
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}
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static VkResult
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@ -4129,20 +4144,15 @@ tu_cmd_render_tiles(struct tu_cmd_buffer *cmd,
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}
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bool has_fdm = fdm || (TU_DEBUG(FDM) && cmd->state.pass->has_fdm);
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/* TODO: we should also be able to merge tiles when only
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* per_view_render_areas is used without FDM. That requires using another
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* method to force disable draws since we don't want to force the viewport
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* to be re-emitted, like overriding the view mask. It would also require
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* disabling stores, and adding patchpoints for CmdClearAttachments in
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* secondaries or making it use the view mask.
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*/
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bool merge_tiles = has_fdm && !TU_DEBUG(NO_BIN_MERGING) &&
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cmd->device->physical_device->info->props.has_bin_mask;
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/* If not using FDM make sure not to accidentally apply the offsets */
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if (!has_fdm)
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fdm_offsets = NULL;
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struct tu_tile_config *tiles = NULL;
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if (has_fdm)
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tiles = tu_calc_tile_config(cmd, vsc, fdm, fdm_offsets);
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/* Create gmem stores now (at EndRenderPass time)) because they needed to
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* know whether to allow their conditional execution, which was tied to a
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* state that was known only at the end of the renderpass. They will be
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@ -4171,12 +4181,6 @@ tu_cmd_render_tiles(struct tu_cmd_buffer *cmd,
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uint32_t tx2 = MIN2(tx1 + vsc->pipe0.width, vsc->tile_count.width);
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uint32_t ty2 = MIN2(ty1 + vsc->pipe0.height, vsc->tile_count.height);
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if (merge_tiles) {
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tu_render_pipe_fdm<CHIP>(cmd, pipe, tx1, ty1, tx2, ty2, fdm,
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fdm_offsets);
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continue;
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}
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uint32_t tile_row_stride = tx2 - tx1;
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uint32_t slot_row = 0;
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for (uint32_t ty = ty1; ty < ty2; ty++) {
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@ -4187,20 +4191,24 @@ tu_cmd_render_tiles(struct tu_cmd_buffer *cmd,
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else
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tx = tile_row_i;
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struct tu_tile_config tile = {
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struct tu_tile_config _tile = {
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.pos = { tx1 + tx, ty },
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.pipe = pipe,
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.slot_mask = 1u << (slot_row + tx),
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.sysmem_extent = { 1, 1 },
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.gmem_extent = { 1, 1 },
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};
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tu_calc_bin_visibility(cmd, &tile, fdm_offsets);
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if (has_fdm)
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tu_calc_frag_area(cmd, &tile, fdm, fdm_offsets);
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else
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tu_identity_frag_area(cmd, &tile);
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struct tu_tile_config *tile = &_tile;
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if (has_fdm) {
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tile = &tiles[ty * vsc->tile_count.width + (tx1 + tx)];
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if (tile->merged_tile || !tile->visible_views)
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continue;
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} else {
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tu_calc_bin_visibility(cmd, tile, fdm_offsets);
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tu_identity_frag_area(cmd, tile);
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}
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tu6_render_tile<CHIP>(cmd, &cmd->cs, &tile, fdm_offsets);
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tu6_render_tile<CHIP>(cmd, &cmd->cs, tile, fdm_offsets);
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}
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slot_row += tile_row_stride;
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}
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@ -4222,6 +4230,8 @@ tu_cmd_render_tiles(struct tu_cmd_buffer *cmd,
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* does its own stores.
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*/
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tu_cs_discard_entries(&cmd->tile_store_cs);
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free(tiles);
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}
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template <chip CHIP>
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