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Author SHA1 Message Date
Eric Engestrom
03f056ea71 ci: skip slow tests on all non-"full" jobs 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31828>
 2024-10-25 08:26:31 +00:00
Eric Engestrom
bedb2f8a86 ci: rename "merge-skips" to "slow-skips" as they're about to be used outside of merge piplines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31828>
 2024-10-25 08:26:31 +00:00
Samuel Pitoiset
927a17f30a amd: do not emit PA_SU_PRIM_FILTER_CNTL in the common GFX preamble 
RADV needs to adjust this register for user sample locations because
it seems possible to have a sample on the -8 coordinate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
 2024-10-25 07:41:22 +00:00
Samuel Pitoiset
3d172d08b0 radv: do no emit PA_SC_CONSERVATIVE_RASTERIZATION_CNTL in the preamble on GFX12 
It's already emitted as part of the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
 2024-10-25 07:41:22 +00:00
Samuel Pitoiset
56cffd4b9b radv: simplify determining if a graphics pipeline uses NGG culling 
has_ngg_culling can only be TRUE if the last VGT shader also uses NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
 2024-10-25 07:10:28 +00:00
Samuel Pitoiset
62efebfd70 radv: fix emitting NGG culling state for ESO 
It's possible to enable NGG culling with ESO if shaders are linked, or
if the VS doesn't need a prolog or if TES is used. This wasn't
supposed to be enabled but I think it worked just by luck because the
user SGPR value was probably zero and NGGC was disabled at draw time.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
 2024-10-25 07:10:27 +00:00
Samuel Pitoiset
982af1a2bc radv: capture shader statistics when RGP is enabled 
This is useful in order to correlate shader hashes between RGP and
Fossilize. This is because Fossilize needs to pass the capture
statistics flag for getting shader hashes and the pipeline key won't
match otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31820>
 2024-10-25 06:29:02 +00:00
Georg Lehmann
b79950fc1f aco: remove heuristic that restricts VOP2/C with 2 sgprs 
Looking at the stats, the slightly increased code size isn't a problem
compared to the benefits. This also only affects gfx10+, and those generations
aren't throughput limited by 64bit instructions like early gcn.

Foz-DB Navi21:
Totals from 12377 (15.59% of 79395) affected shaders:
MaxWaves: 269323 -> 269857 (+0.20%); split: +0.23%, -0.03%
Instrs: 16505304 -> 16472552 (-0.20%); split: -0.21%, +0.01%
CodeSize: 89815804 -> 90130344 (+0.35%); split: -0.02%, +0.37%
VGPRs: 661160 -> 658640 (-0.38%); split: -0.40%, +0.02%
SpillSGPRs: 3032 -> 3049 (+0.56%)
SpillVGPRs: 826 -> 796 (-3.63%)
Latency: 145800231 -> 145818568 (+0.01%); split: -0.14%, +0.15%
InvThroughput: 39026010 -> 38892467 (-0.34%); split: -0.36%, +0.02%
VClause: 325693 -> 325992 (+0.09%); split: -0.12%, +0.21%
SClause: 497938 -> 497208 (-0.15%); split: -0.23%, +0.08%
Copies: 1239036 -> 1204045 (-2.82%); split: -2.90%, +0.07%
Branches: 462952 -> 462934 (-0.00%); split: -0.01%, +0.00%
PreSGPRs: 586066 -> 587558 (+0.25%)
PreVGPRs: 550024 -> 547736 (-0.42%)
VALU: 11147608 -> 11114528 (-0.30%); split: -0.31%, +0.01%
SALU: 2105546 -> 2105131 (-0.02%); split: -0.03%, +0.01%
VMEM: 575983 -> 575923 (-0.01%)

Foz-DB Navi31:
Totals from 11544 (14.54% of 79395) affected shaders:
MaxWaves: 319612 -> 319804 (+0.06%)
Instrs: 17563158 -> 17527341 (-0.20%); split: -0.22%, +0.02%
CodeSize: 92366832 -> 92626280 (+0.28%); split: -0.03%, +0.31%
VGPRs: 667620 -> 665484 (-0.32%); split: -0.33%, +0.01%
SpillSGPRs: 3418 -> 3434 (+0.47%)
SpillVGPRs: 896 -> 858 (-4.24%)
Scratch: 4738048 -> 4736512 (-0.03%)
Latency: 141366653 -> 141399756 (+0.02%); split: -0.10%, +0.12%
InvThroughput: 26213994 -> 26165751 (-0.18%); split: -0.21%, +0.03%
VClause: 307956 -> 308124 (+0.05%); split: -0.12%, +0.18%
SClause: 477816 -> 477326 (-0.10%); split: -0.18%, +0.08%
Copies: 1161148 -> 1129386 (-2.74%); split: -2.81%, +0.08%
Branches: 411509 -> 411506 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 531354 -> 535027 (+0.69%)
PreVGPRs: 525201 -> 521861 (-0.64%)
VALU: 10360363 -> 10330274 (-0.29%); split: -0.30%, +0.01%
SALU: 1778044 -> 1777585 (-0.03%); split: -0.04%, +0.01%
VMEM: 551379 -> 551303 (-0.01%)
VOPD: 3539 -> 3471 (-1.92%); split: +0.14%, -2.06%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31804>
 2024-10-24 17:44:13 +00:00
Georg Lehmann
54fa55a3f7 radv: don't use v_mqsad_u32_u8 on gfx7 
According to tests on hawaii, v_mqsad_u32_u8 always uses saturating accumulation
while v_msad_u8 truncates. GFX8+ can control this with the VOP3 clamp bit,
on older hardware that's not supported.

We want truncation for the NIR opcode.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12062
Fixes: c3c138b10f ("radv: optimize msad_4x8 to mqsad_4x8")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31809>
 2024-10-24 17:20:56 +00:00
Rhys Perry
4579586c66 aco/tests: add tests for VALUReadSGPRHazard 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:08 +00:00
Rhys Perry
47e0f468cf aco: workaround VALUReadSGPRHazard 
fossil-db (gfx1200):
Totals from 65112 (82.01% of 79395) affected shaders:
Instrs: 41732906 -> 42987198 (+3.01%); split: -0.00%, +3.01%
CodeSize: 222451964 -> 226942644 (+2.02%); split: -0.01%, +2.03%
Latency: 290411063 -> 290944688 (+0.18%); split: -0.00%, +0.18%
InvThroughput: 45854913 -> 45910275 (+0.12%); split: -0.00%, +0.12%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry
9ab0c4b047 aco: minor CounterMap::operator== fix 
I don't think this matters for how we use CounterMap::operator==.

The BITSET_TEST() was unnecessary because of the BITSET_EQUAL above.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry
f5b871f825 aco: split CounterMap off from VGPRCounterMap 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Rhys Perry
d312220c2d aco,radv,radeonsi: add aco_shader_info::ps::has_prolog 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
 2024-10-24 16:08:07 +00:00
Samuel Pitoiset
605d4dd42a radv: do not use MRT counters for images created for db capture&replay 
Setting the surface index is optimal for performance in case of
multiple MRTs because addrlib rotates tiles differently.

But this should be disabled when the image is used for descriptor
buffers capture&replay because the descriptor isn't immutable
(ie. tile_swizzle can be different).

This fixes dEQP-VK.binding_model.descriptor_buffer.capture_replay.*
on some GPUs where tile_swizzle is non-zero.

Fixes: 3b57a35ece ("radv: Enable descriptorBufferCaptureReplay.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31818>
 2024-10-24 13:53:20 +00:00
Rhys Perry
d227968201 ac/llvm: cast to integer after derivative intrinsics 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes: daa97bb41a ("amd: switch to derivative intrinsics")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31788>
 2024-10-24 11:23:07 +00:00
Daniel Schürmann
87cb42f953 treewide: don't lower to LCSSA before calling nir_divergence_analysis() 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann
8d1abd4996 treewide: use nir_src_is_divergent() rather than checking the divergence of the SSA 
Without LCSSA, divergence between src and def might differ.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann
c8348139fd nir: change signature of nir_src_is_divergent() 
Now, it takes nir_src * instead of nir_src.
Also move the implementation to nir_divergence_analysis.c.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann
421b42637d nir: remove nir_update_instr_divergence() 
This function has obscure limitations.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Daniel Schürmann
ce0a3fe645 nir/opt_uniform_atomics: don't preserve divergence information 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
 2024-10-24 10:06:17 +00:00
Samuel Pitoiset
be81c8b8db radv: fix initializing the HTILE buffer on transfer queue 
When only of the depth/stencil aspects is used, RADV dispatches a
compute shader to initialize the HTILE buffer. But dispatching on SDMA
just hangs and the only way to initialize the HTILE buffer is to clear
both aspects using a memory fill operation.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31803>
 2024-10-24 06:25:18 +00:00
Georg Lehmann
a4b179e445 aco/ssa_elimination: don't avoid saving exec when optimizing branching sequence 
insert_exec_mask will no longer use s_and_saveexec if there was a previous copy
from a sgpr to exec, so this code path is no longer taken.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann
d2dcaf1f5e aco/insert_exec: reuse old exec temp instead using s_and_saveexec 
This means the v_cmpx optimization in ssa_elimination no longer
needs to insert a copy to save exec.

Foz-DB Navi31:
Totals from 13816 (17.40% of 79395) affected shaders:
Instrs: 23694267 -> 23670199 (-0.10%); split: -0.11%, +0.01%
CodeSize: 124559288 -> 124457508 (-0.08%); split: -0.09%, +0.01%
SpillSGPRs: 5324 -> 5354 (+0.56%); split: -1.00%, +1.56%
Latency: 207245846 -> 207213681 (-0.02%); split: -0.03%, +0.01%
InvThroughput: 35442657 -> 35437220 (-0.02%); split: -0.02%, +0.01%
VClause: 444672 -> 444670 (-0.00%); split: -0.00%, +0.00%
SClause: 639419 -> 639373 (-0.01%); split: -0.04%, +0.03%
Copies: 1529008 -> 1515871 (-0.86%); split: -1.02%, +0.16%
Branches: 557201 -> 557701 (+0.09%); split: -0.00%, +0.09%
PreSGPRs: 682840 -> 686048 (+0.47%)
VALU: 13978010 -> 13978032 (+0.00%); split: -0.00%, +0.00%
SALU: 2214600 -> 2197061 (-0.79%); split: -0.81%, +0.02%
VOPD: 5561 -> 5560 (-0.02%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann
0471522377 aco/insert_exec: reuse old exec temp in loop pre-header 
Avoid an exec copy.

Foz-DB Navi31:
Totals from 2315 (2.92% of 79395) affected shaders:
Instrs: 9082831 -> 9058990 (-0.26%); split: -0.27%, +0.00%
CodeSize: 48017244 -> 47858064 (-0.33%); split: -0.34%, +0.01%
SpillSGPRs: 1680 -> 1684 (+0.24%); split: -0.48%, +0.71%
Latency: 109511718 -> 109525041 (+0.01%); split: -0.01%, +0.02%
InvThroughput: 20287085 -> 20289370 (+0.01%); split: -0.00%, +0.02%
VClause: 192259 -> 192260 (+0.00%)
SClause: 234082 -> 234124 (+0.02%); split: -0.01%, +0.03%
Copies: 667271 -> 645577 (-3.25%); split: -3.27%, +0.02%
Branches: 264086 -> 264088 (+0.00%)
PreSGPRs: 136831 -> 136966 (+0.10%)
VALU: 5234735 -> 5234740 (+0.00%); split: -0.00%, +0.00%
SALU: 949283 -> 927327 (-2.31%); split: -2.32%, +0.01%
VOPD: 1529 -> 1535 (+0.39%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann
31f62a6123 aco/insert_exec: don't always reset top exec 
This allows to re-use previous temporaries in case exec was restored
from a Temp, rather than having to create a new copy of exec.

Foz-DB Navi31:
Totals from 545 (0.69% of 79395) affected shaders:
Instrs: 216563 -> 215698 (-0.40%)
CodeSize: 1183536 -> 1180076 (-0.29%)
Latency: 1135269 -> 1135294 (+0.00%); split: -0.00%, +0.00%
Copies: 11933 -> 11072 (-7.22%)
SALU: 18990 -> 18129 (-4.53%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann
4f04e6f0c4 aco/insert_exec: avoid phis for masks in exec 
Exec always contains the same value as the top of stack, even if the
top of stack is a temporary/constant. So if the predecessors have different
top of stack operands, don't insert a phi and use exec as the new top of stack.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Georg Lehmann
0338bb9ae8 aco/ssa_elimination: also optimize branching sequence with s_and without saveexec 
insert_exec will start using this in the future, handle it the same
just without the path to save exec before the v_cmpx instruction.

No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31567>
 2024-10-23 19:34:53 +00:00
Samuel Pitoiset
9fda96db5b ci: uprev vkd3d-proton to 59d6d4b5ed23766e69fe252408a3401d2fd52ce8 
It contains few fixes for recent DGC tests.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31796>
 2024-10-23 15:47:54 +00:00
Daniel Schürmann
e8472d484f aco/spill: use float division for score() calculation rather than integers 
This was the original intention and should result in more fine-grained
and thus better decisions.

Totals from 63 (0.08% of 79395) affected shaders: (Navi31)
Instrs: 3173500 -> 3174012 (+0.02%); split: -0.01%, +0.02%
CodeSize: 16345348 -> 16349288 (+0.02%); split: -0.01%, +0.03%
Latency: 18528036 -> 18526082 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 3619125 -> 3618709 (-0.01%); split: -0.02%, +0.01%
VClause: 82654 -> 82648 (-0.01%)
SClause: 61256 -> 61257 (+0.00%); split: -0.00%, +0.01%
Copies: 250037 -> 250158 (+0.05%); split: -0.06%, +0.11%
Branches: 101302 -> 101303 (+0.00%)
VALU: 1791447 -> 1791435 (-0.00%); split: -0.00%, +0.00%
SALU: 401898 -> 402007 (+0.03%); split: -0.03%, +0.06%
VOPD: 730 -> 741 (+1.51%)

Totals from 40 (0.06% of 63053) affected shaders: (Vega10)

Instrs: 161584 -> 161567 (-0.01%); split: -0.04%, +0.03%
CodeSize: 891168 -> 891004 (-0.02%); split: -0.04%, +0.03%
Latency: 3550766 -> 3549770 (-0.03%); split: -0.05%, +0.03%
InvThroughput: 2627028 -> 2626484 (-0.02%); split: -0.03%, +0.01%
VClause: 2970 -> 2971 (+0.03%)
SClause: 4203 -> 4205 (+0.05%); split: -0.26%, +0.31%
Copies: 19923 -> 19893 (-0.15%); split: -0.44%, +0.29%
VALU: 116045 -> 116054 (+0.01%); split: -0.01%, +0.02%
SALU: 22100 -> 22066 (-0.15%); split: -0.39%, +0.24%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31769>
 2024-10-23 14:35:29 +00:00
Daniel Schürmann
30d85b23ef aco/spill: fix faulty assertions 
By unintentionally using integer division for score(), these
assertions were likely to be raised by accident.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31769>
 2024-10-23 14:35:29 +00:00
Daniel Schürmann
d5581b1124 aco/live_var_analysis: check isFixed() for definitions in order to set needs_vcc 
In rare cases, it could happen that during post-RA validation,
live-var-analysis sets needs_vcc = false after if was true
before register allocation.

Fixes: bb5eace0dc ('aco/live_var_analysis: check for isPrecolored flag rather than isFixed')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31791>
 2024-10-23 09:42:26 +00:00
Samuel Pitoiset
3a5d40b152 radv: fix enabling/disabling user sample locations 
When user sample locations are disabled dynamically, the driver should
re-emit the standard sample locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31786>
 2024-10-23 06:28:20 +00:00
Georg Lehmann
5da34ebee4 aco/insert_exec: remove get_exec_op 
We used to only store Temps in the stack, so undef meant exec.
Then the stack was changed to operands, and some places started storing exec
directly, drop the undef handling by replacing everything with Operand(exec, lm)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
8d148401cb aco/ir: rework Operand equality to return true for equal fixed non-temp ops 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
6716fb08d8 aco/insert_exec: remove unused includes 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
23fb0883eb aco/insert_exec: untangle add_branch_code control flow 
All of the single ifs with return hide that this is effectively almost an
if-else chain, so convert it to one for real.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
de7d931962 aco/insert_exec: remove stray break_cond variable 
This was always trivial since some discard rework.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
ade7f1a203 aco/insert_exec: replace pair with a named struct 
.first and .second everywhere was hard to read.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Georg Lehmann
a3054499ba aco/insert_exec: don't pretend WQMState is a bit mask 
It's a simple enum.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31560>
 2024-10-22 17:03:26 +00:00
Samuel Pitoiset
7cd7631554 ci: uprev vkd3d-proton to 65b81403435576d882d9141ae3eb4a29373fba0e 
For EXT DGC implementation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31754>
 2024-10-22 14:12:32 +00:00
Daniel Schürmann
ef47cce51c aco/ra: always block register file for precolored operands 
so that they don't accidentally get renamed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31387>
 2024-10-22 12:29:18 +00:00
Daniel Schürmann
18e7e8d8f0 aco/ra: make use of Precolored flag 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31387>
 2024-10-22 12:29:18 +00:00
Daniel Schürmann
bb5eace0dc aco/live_var_analysis: check for isPrecolored flag rather than isFixed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31387>
 2024-10-22 12:29:18 +00:00
Daniel Schürmann
e2705a9d85 aco: set Precolored flag before register allocation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31387>
 2024-10-22 12:29:18 +00:00
Daniel Schürmann
c2ed4b474a aco: introduce 'isPrecolored' flag for Operand and Definition 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31387>
 2024-10-22 12:29:18 +00:00
Samuel Pitoiset
b33f47b498 radv: regroup and emit all DS related states in the same function 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
 2024-10-22 11:52:10 +00:00
Samuel Pitoiset
8791e56b62 radv: track more redundant DB related registers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
 2024-10-22 11:52:10 +00:00
Rhys Perry
8221367fba radv: use explicitly sized types for some radv_shader_info members 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593>
 2024-10-21 15:52:53 +00:00
Rhys Perry
4383a917e6 radv: optimize VS input load components to constants earlier 
This helps some linking optimizations.

fossil-db (navi21):
Totals from 2262 (2.85% of 79395) affected shaders:
MaxWaves: 57680 -> 57738 (+0.10%); split: +0.11%, -0.01%
Instrs: 1061526 -> 1053937 (-0.71%); split: -0.79%, +0.07%
CodeSize: 5766352 -> 5736784 (-0.51%); split: -0.60%, +0.08%
VGPRs: 89376 -> 89000 (-0.42%); split: -0.43%, +0.01%
Latency: 4102938 -> 4059773 (-1.05%); split: -1.14%, +0.08%
InvThroughput: 1105885 -> 1092291 (-1.23%); split: -1.24%, +0.01%
VClause: 18917 -> 18972 (+0.29%); split: -0.12%, +0.41%
SClause: 28839 -> 28115 (-2.51%); split: -3.32%, +0.81%
Copies: 73396 -> 72671 (-0.99%); split: -1.63%, +0.65%
PreSGPRs: 65866 -> 65838 (-0.04%); split: -0.22%, +0.17%
PreVGPRs: 69752 -> 69278 (-0.68%)
VALU: 680351 -> 673489 (-1.01%); split: -1.03%, +0.02%
SALU: 121459 -> 121515 (+0.05%); split: -0.00%, +0.05%
VMEM: 29632 -> 30021 (+1.31%); split: -0.02%, +1.33%
SMEM: 73744 -> 73836 (+0.12%); split: -0.01%, +0.14%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593>
 2024-10-21 15:52:53 +00:00