Commit graph

69934 commits

Author SHA1 Message Date
Dave Airlie
023fc344da glsl: track which program inputs are doubles
instead of doing the attempts at dual slot handling here,
let the backend do it.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
5d6190e496 glsl: add ARB_vertex_attrib_64bit support. (v2)
Just more boilerplate stuff.

v2:
bad fallthrough on versioning,
this is my ugly but self contained solution (Ian)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
fc71ae7c57 mesa: add ARB_vertex_attrib_64bit to extensions. (v2)
Just add the boilerplate bits.

v2: add to version.c

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
5a7f04925f mapi: add GL_ARB_vertex_attrib_64bit support
This just adds the glapi bits.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Dave Airlie
731b7c49bb st/glsl_to_tgsi: fix ir_assignment hack doing bad things for doubles
This hack for fixing gl_FragDepth apparantly caused a GLSL shader
outputting a single double to try and output a dvec4, but we hadn't
assigned outputs for the secondary bit.

This avoids going into the hack code for scalar doubles.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-05-08 10:21:01 +10:00
Topi Pohjolainen
b1119ce838 i965/wm/gen6: Add option for disabling statistics collection
Normally this is always needed but for internal blits and clears
we need to be able to disable it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-07 22:30:18 +03:00
Topi Pohjolainen
dae7183cdd i965/wm/gen6: Refactor state setup
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2015-05-07 22:30:17 +03:00
Anuj Phogat
d14f3e14b4 i965: Remove unused variables
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-05-07 11:43:01 -07:00
Anuj Phogat
15259d63e8 i965: Change the order of conditions tested in if
Reduces the number of conditions tested in if to one in case of
non-integer formats. Makes no functional changes.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-07 11:43:01 -07:00
Matt Turner
8e029105c2 nir: Allow feq/fne/ieq/ine to be optimized with inot.
instructions in affected programs:     380 -> 376 (-1.05%)
helped:                                2

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
f5cf74d8ba nir: Recognize (a < c || b < c) as min(a, b) < c.
... and (a >= c) || (b >= c) as max(a, b) >= c.

Similar to commit 97e6c1b9.

total instructions in shared programs: 6182276 -> 6182180 (-0.00%)
instructions in affected programs:     6400 -> 6304 (-1.50%)
helped:                                68
HURT:                                  4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
ceb8b739ce nir: Recognize trivial min/max.
No changes, but does prevent some regressions in the next commit.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
8ae559971a nir: Recognize i2b(b2i(x)) as x.
Helps the same set of programs as the previous commit.

instructions in affected programs:     4490 -> 4346 (-3.21%)
helped:                                8

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Matt Turner
74697e2844 nir: Recognize imul(b2i(a), b2i(b)) as a logical AND.
Four shaders in Unreal 4's Sun Temple are helped, and gain SIMD16
because we avoid an integer multiplication.

instructions in affected programs:     2353 -> 2245 (-4.59%)
helped:                                4
GAINED:                                4

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Glenn Kennard <glenn.kennard@gmail.com>
2015-05-07 10:51:05 -07:00
Chad Versace
c636284ee8 i965/sync: Implement DRI2_Fence extension
This enables EGL_KHR_fence_sync and EGL_KHR_wait_sync.

Below is the difference in piglit results, before and after this patch.
No regressions and several tests improve from 'skip' to 'pass'. Out of
EGL_KHR_fence_sync tests, two of the multithreaded tests skip; all other
tests pass.

  cmdline: piglit run -p gbm -t sync tests/quick.py
  mesa: master@1ac7db0
  piglit: 4069bec
  hw: Ivybridge

        | before after
  ------+-------------
   pass |     32    46
   fail |      0     0
  crash |      0     0
   skip |     35    21
  total |     67    67

v2:
  - Set fence->signalled = true in brw_fence_has_completed() too.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:22 -07:00
Chad Versace
2516d835b1 i965/sync: Replace prefix 'intel_sync' -> 'intel_gl_sync'
I'm about to implement DRI2_Fenc in intel_syncobj.c.  To prevent
madness, we need to prefix functions for GL_ARB_sync with 'gl' and
functions for DRI2_Fence with 'dri'. Otherwise, the file will become
a jumble of similiarly named functions.

For example:
    old-name:      intel_client_wait_sync()
    new-name:      intel_gl_client_wait_sync()
    soon-to-come:  intel_dri_client_wait_sync()

I wrote this renaming commit separately from the commit that implements
DRI2_Fence because I wanted the latter diff to be reviewable.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
19b5a82fda i915/sync: Return early when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
00f3c7baeb i965/sync: Return NULL when calloc fails
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
9cf9a2dec5 i915/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
a93ab73a07 i965/sync: Don't crash when deleting sync object
Don't pass NULL to drm_intel_bo_unreference(). It doesn't like that.

Bug found by code inspection.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-07 08:11:21 -07:00
Chad Versace
a6bfdd7b46 egl/dri2: Fix codestyle in a comment
Pointed out by Kenneth Graunke. Trivial fix.
2015-05-07 08:09:07 -07:00
Martin Peres
cedd5008da glx: report which DRI version is used when in verbose debug mode
This should make it more obvious in bug reports while also removing
any sort of guesswork for developers.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-07 16:56:14 +03:00
Vinson Lee
cf5e015f71 glapi: Add positional argument specifier.
Fix build error introduced with commit 1c5a57a "glapi/es3.1: Add support
for GLES versions > 3.0" with Python < 2.7.

  File "src/mapi/glapi/gen/gl_genexec.py", line 230, in <module>
    printer.Print(api)
  File "src/mapi/glapi/gen/gl_XML.py", line 120, in Print
    self.printBody(api)
  File "src/mapi/glapi/gen/gl_genexec.py", line 187, in printBody
    condition_parts.append('(ctx->API == API_OPENGLES2 && ctx->Version >= {})'.format(int(f.api_map['es2'] * 10)))
ValueError: zero length field name in format

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-05-06 23:26:21 -07:00
Ilia Mirkin
55b66dc4de nv50/ir: add SHL to the list of U32 opcodes
Having the wrong inferred type prevents a number of optimizations,
including constant propagation (since float immediates work differently
than integer immediates).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-06 20:50:03 -04:00
Ian Romanick
51e3453785 i965: Sort extension enable lists
Sort by GEN, then sort by extension name.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-06 13:05:18 -07:00
Vinson Lee
382b1a36e3 r600g: Fix Clang return-type build error.
Fix Clang return-type error introduced with commit
96f164f6f0 "gallium: make
pipe_context::begin_query return a boolean".

  CC       r600_query.lo
r600_query.c:443:3: error: non-void function 'r600_begin_query' should return a value [-Wreturn-type]
                return;
                ^

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-05-06 12:21:34 -07:00
Kenneth Graunke
0c0ca55711 i965/fs: Allow copy propagation on ATTR file registers.
This especially helps with NIR because we currently emit MOVs at the top
of the shader to copy from various ATTR registers to a giant VGRF array
of all inputs.  (This could potentially be done better, but since
there's only ever one write to each register, it should be trivial to
copy propagate away...)

With NIR - only vertex shaders:
total instructions in shared programs: 3129373 -> 2889581 (-7.66%)
instructions in affected programs:     3119717 -> 2879925 (-7.69%)
helped:                                20833

Without NIR - only vertex shaders:
total instructions in shared programs: 2745901 -> 2724483 (-0.78%)
instructions in affected programs:     693426 -> 672008 (-3.09%)
helped:                                3516

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
7a75b55a01 i965/fs_inst: Get rid of the effective_width field
The effective_width field was an ill-concieved hack to get around issues in
the LOAD_PAYLOAD instruction.  Now that the LOAD_PAYLOAD instruction is far
more sane, this field can die.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
41868bb682 i965/fs: Rework the fs_visitor LOAD_PAYLOAD instruction
The newly reworked instruction is far more straightforward than the
original.  Before, the LOAD_PAYLOAD instruction was lowered by a the
complicated and broken-by-design pile of heuristics to try and guess
force_writemask_all, exec_size, and a number of other factors on the
sources.

Instead, we use the header_size on the instruction to denote which sources
are "header sources".  Header sources are required to be a single physical
hardware register that is copied verbatim.  The registers that follow are
considered the actual payload registers and have a width that correspond's
to the LOAD_PAYLOAD's exec_size and are treated as being per-channel.  This
gives us a fairly straightforward lowering:

 1) All header sources are copied directly using force_writemask_all and,
    since they are guaranteed to be a single register, there are no
    force_sechalf issues.

 2) All non-header sources are copied using the exact same force_sechalf
    and force_writemask_all modifiers as the LOAD_PAYLOAD operation itself.

 3) In order to accommodate older gens that need interleaved colors,
    lower_load_payload detects when the destination is a COMPR4 register
    and automatically interleaves the non-header sources.  The
    lower_load_payload pass does the right thing here regardless of whether
    or not the hardware actually supports COMPR4.

This patch commit itself is made up of a bunch of smaller changes squashed
together.  Individual change descriptions follow:

i965/fs: Rework fs_visitor::LOAD_PAYLOAD

   We rework LOAD_PAYLOAD to verify that all of the sources that count as
   headers are, indeed, exactly one register and that all of the non-header
   sources match the destination width.  We then take the exec_size for
   LOAD_PAYLOAD directly from the destination width.

i965/fs: Make destinations of load_payload have the appropreate width

i965/fs: Rework fs_visitor::lower_load_payload

   v2: Don't allow the saturate flag on LOAD_PAYLOAD instructions

i965/fs_cse: Support the new-style LOAD_PAYLOAD

i965/fs_inst::is_copy_payload: Support the new-style LOAD_PAYLOAD

i965/fs: Simplify setup_color_payload

   Previously, setup_color_payload was a a big helper function that did a
   lot of gen-specific special casing for setting up the color sources of
   the LOAD_PAYLOAD instruction.  Now that lower_load_payload is much more
   sane, most of that complexity isn't needed anymore.  Instead, we can do
   a simple fixup pass for color clamps and then just stash sources
   directly in the LOAD_PAYLOAD.  We can trust lower_load_payload to do the
   right thing with respect to COMPR4.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
94ee908448 i965/fs: Make LOAD_PAYLOAD take a header size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
74dccdad4b i965/fs: Make emit_single_fb_write take an explicit exec_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
32af7d4188 i965/fs_inst: Add an is_copy_payload helper
This commit adds a new is_copy_payload helper to fs_inst that takes the
place of the similarly named functions in cse and register coalesce.  The
two is_copy_payload functions in CSE and register coalesce were subtly
different and potentially subtly broken.  The new version unifies the two
and should be more correct.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
76c1086f2d i965: Change header_present to header_size in backend_instruction
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:30 -07:00
Jason Ekstrand
a9ccb14d14 i965/fs_cse: Factor out code to create copy instructions
v2: Get rid of the block parameter and make src a const reference

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:29 -07:00
Jason Ekstrand
cf4607e853 i965/fs: Make half(fs_reg, unsigned) handle register files more explicitly
Previously, we had a special case for uniforms and immediates and then a
bunch of asserts for various other pessimal things.  This commit changes it
so that it explicitly does something on each register file.  Some of them
are disallowed and others are treated properly.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 10:29:29 -07:00
Francisco Jerez
88414de45e i965/fs: Fix passing an immediate to half().
Immediates are generally uniform, they yield the same value to both
halves of any instruction.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-05-06 10:29:29 -07:00
Jeremy Huddleston Sequoia
5b2d3480f5 swrast: Build fix for darwin
Fixes regression from commit 64b1dc4449

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90147
Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
CC: jon.turney@dronecode.org.uk
CC: ionic@macports.org
2015-05-06 10:04:05 -06:00
Chad Versace
b0f410a2a0 egl/dri2: Check return value of __DRI2fence::create_fence()
If it returns NULL, then return early with an error.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2015-05-06 07:55:41 -07:00
Roland Scheidegger
b8a1495106 draw: (trivial) fix out-of-bounds vector initialization
Was off-by-one. llvm says inserting an element with an index higher than the
number of elements yields undefined results. Previously such inserts were
ignored but as of llvm revision 235854 the vector gets replaced with undef,
causing failures.
This fixes piglit gl-3.2-layered-rendering-gl-layer, as mentioned in
https://llvm.org/bugs/show_bug.cgi?id=23424.

Reviewed-by: Brian Paul <brianp@vmware.com>
Cc: mesa-stable@lists.freedesktop.org
2015-05-06 16:51:09 +02:00
Martin Peres
9891fc329b main/queryobj: add GL_QUERY_TARGET support to GetQueryObjectiv()
This was missing from my patchset to support the query-related entry
points of Direct State Access.

Reported-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 15:26:12 +03:00
Chia-I Wu
ef5d4bcc3a ilo: silence a compiler warning
Silence

  ilo_query.c:120:7: warning: 'return' with no value, in function returning non-void

since commit 96f164f6.
2015-05-06 16:35:30 +08:00
Tapani Pälli
818cc90535 mesa: support compute stage in _mesa_program_resource_prop
Increases pass rate of ES31-CTS.*program_interface_query* tests
when run with MESA_EXTENSION_OVERRIDE='GL_ARB_compute_shader'. Many
of the negative tests that happen to use compute stage in queries
start passing.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 11:12:01 +03:00
Tapani Pälli
3706e5dbc9 glsl: mark special built-in inputs referenced by vertex stage
Refactoring done on active attribute queries did not take in to
account special built-in inputs for the vertex stage. This commit
sets them referenced by vertex stage so that they get enumerated
properly.

Fixes Piglit test 'get-active-attrib-returns-all-inputs' failure.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90243
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-By: Martin Peres <martin.peres@linux.intel.com>
2015-05-06 11:10:51 +03:00
Chris Forbes
1fcdb2ce79 relnotes: Note support for viewport arrays on i965/Gen6.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
2015-05-06 19:05:17 +12:00
Chris Forbes
5fc23375e8 i965/gen6: Enable ARB_viewport_array and AMD_vertex_shader_viewport_index
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:58 +12:00
Chris Forbes
c41f625200 i965/gen6: Upload all the SF viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:57 +12:00
Chris Forbes
2a8835d485 i965/gen6: Upload all the clip viewports
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:55 +12:00
Chris Forbes
0374159b0c i965/gen6: setup limits for ARB_viewport_array
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-05-06 19:01:38 +12:00
Brian Paul
212f26bb60 st/mesa: fix pipe_query_result result initializer
Fixes MSVC build error.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 16:00:54 -06:00
Brian Paul
062e2b06b2 st/mesa: fix st_NewPerfMonitor() declaration
Was missing the context parameter.  Fixes MSVC warning.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-05-05 16:00:53 -06:00