Commit graph

205360 commits

Author SHA1 Message Date
Mel Henning
68069fb810 nak: SrcRef is no longer Copy
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
a9d2789237 nak: Src is no longer Copy
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Faith Ekstrand
30f6ca6391 nak: Replace Src::new_zero() with a ZERO constant
Constants have different rules with respect to the Copy trait and using
a constant will allow us to initialize arrays even once Copy is gone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
f21557154b nak/from_nir: Turn srcs into a closure
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
854b2d5882 nak: Dst is no longer Copy
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
0ac3296f28 nak/from_nir: Make fault an Option<SSAValue>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
ddcf0029cd nak: Use references to src/dst more places
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
ffe438c77d nak: Return SSAValue from builder where possible
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
b9e9a811b8 nak: Split scalar/vec in SSABuilder::alloc_ssa
SSABuilder::alloc_ssa() is now only for scalars. We intoduce
SSABuilder::alloc_ssa_vec() which handles the vector case the way
alloc_ssa previously did. This matches the split used in SSAValueAllocator

We're about to drop Copy from SSARef, which makes it a lot more annoying
to deal with. SSAValue will remain Copy though, so we want to start
using it instead of SSARef where possible.

Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
1ff9848d25 nak: Use NonZeroU32 for SSAValue and remove NONE
Code that might have an invalid SSAValue is encouraged to use
Option<SSAValue> instead of NONE, which is now the same size as a u32
and provides more type safety.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Mel Henning
121b2b889b nak: Add an SSARef::from_iter() helper
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34794>
2025-05-05 23:08:02 +00:00
Yiwei Zhang
4f07092bdb venus: fix to passively enable wsi required extensions
Required extensions to support wsi have been relaxed earlier for sw blit
path. So the renderer extensions enablement is fixed to be passive based
on the renderer side correspondingly.

Test: emulate to drop dma-buf and modifier support from host anv driver,
and confirm wsi via venus works with sw blit fallback and device
creation no longer returns VK_ERROR_FEATURE_NOT_PRESENT.

Fixes: 06f5d1a105 ("venus: expose WSI on renderer without dma-buf support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34827>
2025-05-05 21:43:33 +00:00
Collabora's Gfx CI Team
149bad63ea Uprev Piglit to 1498c397ea35119692b579dd6f523de4651c663f
Some checks are pending
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c50d9aa54f...1498c397ea

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34688>
2025-05-05 20:34:12 +00:00
Faith Ekstrand
2f8b27713d nak: Fold Src::fold_imm() into the legalization pass
Some checks are pending
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
c3417c3c82 nak: Use as_u32() directly in Src::is_fneg_zero()
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
274be4291e nak: Handle SrcType::F64 in Src::is_fneg_zero()
We handled it fine if src_ref was SrcRef::Zero but not if src_ref was
SrcRef::Imm32(0x80000000), which is also negative zero.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
8a4ffe3c7e nak: Fold source modifiers in Src::as_u32()
For now we leave a fold_imm() helper with the old semantics because
there are still two uses of it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
4648a15476 nak: Take a SrcType in Src::as_u32()
Without a type, we can't really interpret the data.  Currently, it just
returns None in the presence of modifiers so it's okay.  Also, all of
the callers of this helper today do so on the source of an OpPrmt which
doesn't support source modifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
4b5eec6c2a nak/sm20: Use SrcRef::as_u32()
This makes more sense as we don't want any complex logic around source
modifiers or any of that.  We just want to handle Zero and Imm32 in the
same case.  Also, explicitly assert that modifiers are None, which is
more clear anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
Faith Ekstrand
cb156a468e nak: Match on the SrcRef directly in Src::is_nonzero()
Calling as_u32() isn't really doing us any good here since we want to
fail for SrcRef::Zero anyway.  Also assert that src_mod == None since we
don't handle FNeg in this path.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34818>
2025-05-05 17:51:25 +00:00
José Roberto de Souza
a82b569649 anv: Reduce memory pool usage in MTL and ARL
Those platforms requires aux map with 1MB alignment, for slab that
means that any buffer needs to have size of multiple of 1MB what
causes a lot of memory to be wasted causing it to run out of memory
when running multiple GPU applications.

Fixes: ea18572ff2 ("anv: Add support for ANV_BO_ALLOC_AUX_CCS in anv_slab_bo")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34817>
2025-05-05 16:42:14 +00:00
Karol Herbst
7c78c76181 iris/xe: take the grids variable_shared_mem into account
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This fixes OpenCL local memory kernel arguments.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
2025-05-05 16:04:17 +00:00
Karol Herbst
fee9230bb5 iris/xe: fix compute shader start address
It needs to apply the offset so it selects the correct SIMD shader.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
2025-05-05 16:04:17 +00:00
Karol Herbst
57ccfd0502 iris: parse global bindings for every gen
This fixes OpenCL support on gen 12.5+

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34548>
2025-05-05 16:04:17 +00:00
Mary Guillemard
8447f7aaae pan/genxml: Fix inverted logic on nr_regs
v10 have 96 and v12+ have 128, not the opposite.

Fixes: 811525b543 ("pan/genxml: Build libpanfrost_decode for v12")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34815>
2025-05-05 15:31:38 +00:00
Samuel Pitoiset
1aa5fd5da2 radv: promote VK_EXT_robustness2 to VK_KHR_robustness2
This is a 1:1 promotion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
2025-05-05 15:02:19 +00:00
Samuel Pitoiset
4e09a5c992 vulkan: Update XML and headers to 1.4.314
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
2025-05-05 15:02:19 +00:00
Samuel Pitoiset
02d7c8f9d3 spirv: Update the JSON and headers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34810>
2025-05-05 15:02:19 +00:00
Eric Engestrom
7e0f157b8a ci: pass vk_require_etc2 from radv jobs through to the duts
history:
- 8d83ffe531 ("radv/ci: Add coverage for ETC2 emulation.")
  var added to the jobs as `radv_require_etc2`, but not passed to duts
- 567c32b55c ("radv, drirc: rename radv_require_{etc2,astc}")
  var renamed to `vk_require_etc2`, except in the jobs
- 5f177018f7 ("radv/ci: re-enable ET2C emulation testing on non-native GPUs")
  var renamed in the jobs, but still not passed to duts

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34796>
2025-05-05 15:53:45 +02:00
Samuel Pitoiset
0684dc5fa8 radv: fix GPU hangs with image copies for ASTC/ETC2 formats on transfer queue
Some checks are pending
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Emitting compute dispatches on SDMA just hangs. It might be needed
to switch to gang submit for these to work but fixing the GPU hang is
more important for now.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34805>
2025-05-05 13:50:25 +00:00
Valentine Burley
b8c47c5535 turnip/ci: Update expectations
This test was fixed in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32540.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34792>
2025-05-05 13:28:41 +00:00
Valentine Burley
8b835a4abb freedreno/ci: Document regressions
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34792>
2025-05-05 13:28:41 +00:00
Valentine Burley
0f5ab7af3d anv/ci: Update expectations
These Vulkan Video tests were fixed in f7ff9b240d ("anv: Do not support the tiling of DRM modifier if DECODE_DST")

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34792>
2025-05-05 13:28:40 +00:00
Valentine Burley
9ac2b73cf4 iris/ci: Update trace checksums
These traces have been failing for a while now.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34792>
2025-05-05 13:28:40 +00:00
Eric Engestrom
31c2fae476 llvmpipe/ci: document regression in a02b6e6b...676e26ae
Reported at https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33415#note_2896031

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
51c5b7e3f9 etnaviv/ci: document two fixed tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
7b14b1d350 lavapipe/ci: document flakes (including a flaky timeout) seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
5cf33e6704 zink+nvk/ci: document flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
5b958bd18f zink+radv/ci: document flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
32fe00280a turnip/ci: document flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
c145f7f2dc radeonsi/ci: document flakes seen recently
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Eric Engestrom
a601d68898 radv/ci: document flakes seen recently
The dEQP-VK.ray_tracing_pipeline.* ones might need a bigger net to catch
them all, but I didn't want to prematurely ignore too many tests, so for
now I'm just dumping a big list.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34811>
2025-05-05 12:23:02 +00:00
Rhys Perry
75880655f8 nir/lower_gs_intrinsics: silence warning
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../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c: In function ‘nir_lower_gs_intrinsics’:
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:523:93: warning: ‘state’ may be used uninitialized [-Wmaybe-uninitialized]
  523 |             state.decomposed_primitive_count_vars[i] = state.decomposed_primitive_count_vars[0];
      |                                                        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_lower_gs_intrinsics.c:464:17: note: ‘state’ declared here
  464 |    struct state state;
      |                 ^~~~~

It's always initialized by the first iteration of the loop, but GCC
doesn't seem to know that.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
2025-05-05 11:45:42 +00:00
Rhys Perry
bc49045294 nir/opt_shrink_vectors: add assume to silence warning
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c: In function ‘shrink_dest_to_read_mask’:
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:140:36: warning: writing 16 bytes into a region of size 15 [-Wstringop-overflow=]
  140 |             swizzle[first_bit + i] = i;
      |             ~~~~~~~~~~~~~~~~~~~~~~~^~~
../../../../../../../mesa/src/compiler/nir/nir_opt_shrink_vectors.c:138:18: note: at offset [1, 15] into destination object ‘swizzle’ of size 16
  138 |          uint8_t swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
      |                  ^~~~~~~

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
2025-05-05 11:45:42 +00:00
Rhys Perry
5629332dcf util: silence -Wstringop-overread in SHA1
In function ‘SHA1Update’,
    inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:157:2,
    inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 1 [-Wstringop-overread]
  135 |                         SHA1Transform(context->state, (uint8_t *)&data[i]);
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
   55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
      | ^~~~~~~~~~~~~
In function ‘SHA1Update’,
    inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:159:3,
    inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 1 [-Wstringop-overread]
  135 |                         SHA1Transform(context->state, (uint8_t *)&data[i]);
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
   55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
      | ^~~~~~~~~~~~~
In function ‘SHA1Update’,
    inlined from ‘SHA1Pad’ at ../../../../../../../mesa/src/util/sha1/sha1.c:160:2,
    inlined from ‘SHA1Final’ at ../../../../../../../mesa/src/util/sha1/sha1.c:168:2:
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 8 [-Wstringop-overread]
  135 |                         SHA1Transform(context->state, (uint8_t *)&data[i]);
      |                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../../../../../../../mesa/src/util/sha1/sha1.c:135:25: note: referencing argument 2 of type ‘const uint8_t[64]’ {aka ‘const unsigned char[64]’}
../../../../../../../mesa/src/util/sha1/sha1.c: In function ‘SHA1Final’:
../../../../../../../mesa/src/util/sha1/sha1.c:55:1: note: in a call to function ‘SHA1Transform’
   55 | SHA1Transform(uint32_t state[5], const uint8_t buffer[SHA1_BLOCK_LENGTH])
      | ^~~~~~~~~~~~~

Reaching this code is impossible for the SHA1Update() calls in SHA1Pad().
Use assume() to inform the compiler of this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34785>
2025-05-05 11:45:41 +00:00
Danylo Piliaiev
2797f42451 tu: Fix disable_fs state update condition
tu_calc_disable_fs depends on FS, so it should be updated on
TU_CMD_DIRTY_FS.

Fixes: be481e6615 ("tu: Disable FS in certain cases even if FS is not empty")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34791>
2025-05-05 11:09:31 +00:00
Danylo Piliaiev
969820e7fe tu/lrz: Disable LRZ if RP writes depth but doesn't set on GPU dir
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If the render pass writes depth (with direction) but doesn't set
direction on the GPU, the LRZ buffer cannot be used in subsequent
render passes because the direction information is lost.

Fixes rendering in "Elite Dangerous" game.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
2025-05-05 09:32:53 +00:00
Danylo Piliaiev
f903397874 tu/lrz: Call tu_lrz_write_disable_reason once per RP
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
2025-05-05 09:32:53 +00:00
Danylo Piliaiev
6d84dac827 tu/lrz: Fix NOLRZ dbg option
Didn't fully disable LRZ.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
2025-05-05 09:32:53 +00:00
Danylo Piliaiev
9d20241a03 tu/lrz: Fix DONT_CARE not resulting in disabled LRZ
- LOAD results in reusing LRZ from previous renderpasses.
- CLEAR clears LRZ.
- DONT_CARE doesn't clear and doesn't load, so LRZ should be
  disabled, that was also the initial idea in code, but conditions
  didn't work out and are now fixed.

Fixes glcts tests:
 KHR-GL46.packed_depth_stencil.blit.depth24_stencil8
 KHR-GL46.packed_depth_stencil.blit.depth32f_stencil8
 KHR-GLES3.packed_depth_stencil.blit.depth24_stencil8
 KHR-GLES3.packed_depth_stencil.blit.depth32f_stencil8

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34577>
2025-05-05 09:32:53 +00:00