From bc9ce9705c0e1fc76228ca4914fa2ce1e06a4394 Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Mon, 31 Jan 2022 16:07:34 -0500 Subject: [PATCH] intel/isl: Fix depth buffer TiledSurface programming The assert for the TiledSurface field caught a programming error, but with a segfault instead of the usual route of assert-failing. We only set this field when we have a depth surface, but we also need to set it when one isn't provided. Fix this issue and drop the assert. Fixes: b77d694223a ("intel/isl: Allow HiZ with Tile4/64 surfaces") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5950 Reviewed-by: Lionel Landwerlin Reviewed-by: Kenneth Graunke Part-of: --- src/intel/isl/isl_emit_depth_stencil.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c index b72ed25d3e6..887d5e11247 100644 --- a/src/intel/isl/isl_emit_depth_stencil.c +++ b/src/intel/isl/isl_emit_depth_stencil.c @@ -153,16 +153,14 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch, if (separate_stencil || info->hiz_usage == ISL_AUX_USAGE_HIZ) { assert(ISL_DEV_USE_SEPARATE_STENCIL(dev)); db.SeparateStencilBufferEnable = true; + db.HierarchicalDepthBufferEnable = true; /* From the IronLake PRM, Vol 2 Part 1, * 3DSTATE_DEPTH_BUFFER::Tiled Surface, * * When Hierarchical Depth Buffer is enabled, this bit must be set. - * - * HiZ only works on tiled depth buffers. */ - assert(info->depth_surf->tiling != ISL_TILING_LINEAR); - db.HierarchicalDepthBufferEnable = true; + db.TiledSurface = true; } #endif