2013-07-07 19:02:56 -07:00
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/*
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s/Tungsten Graphics/VMware/
Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the
old copyright name is creating unnecessary confusion, hence this change.
This was the sed script I used:
$ cat tg2vmw.sed
# Run as:
#
# git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed
#
# Rename copyrights
s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g
/Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./
s/TUNGSTEN GRAPHICS/VMWARE/g
# Rename emails
s/alanh@tungstengraphics.com/alanh@vmware.com/
s/jens@tungstengraphics.com/jowen@vmware.com/g
s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/
s/jrfonseca\?@tungstengraphics.com/jfonseca@vmware.com/g
s/keithw\?@tungstengraphics.com/keithw@vmware.com/g
s/michel@tungstengraphics.com/daenzer@vmware.com/g
s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/
s/zack@tungstengraphics.com/zackr@vmware.com/
# Remove dead links
s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g
# C string src/gallium/state_trackers/vega/api_misc.c
s/"Tungsten Graphics, Inc"/"VMware, Inc"/
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-01-17 16:27:50 +00:00
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* Copyright 2003 VMware, Inc.
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2013-07-07 19:02:56 -07:00
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* Copyright © 2006 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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/**
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2021-04-05 10:44:41 -07:00
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* \file intel_debug.c
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2013-07-07 19:02:56 -07:00
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*
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* Support for the INTEL_DEBUG environment variable, along with other
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* miscellaneous debugging code.
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*/
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2019-12-24 02:40:26 +02:00
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#include <stdio.h>
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2017-03-01 11:20:25 -08:00
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#include <stdlib.h>
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2019-12-24 02:40:26 +02:00
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#include <string.h>
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2017-03-01 11:20:25 -08:00
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2021-04-05 10:44:41 -07:00
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#include "dev/intel_debug.h"
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2017-03-01 11:20:25 -08:00
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#include "util/macros.h"
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2022-09-13 12:49:56 +03:00
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#include "util/u_debug.h"
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2023-02-22 19:07:52 -08:00
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#include "util/u_math.h"
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2017-03-05 23:23:25 +02:00
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#include "c11/threads.h"
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2013-07-07 19:02:56 -07:00
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2025-04-23 09:00:50 +03:00
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BITSET_WORD intel_debug[BITSET_WORDS(INTEL_DEBUG_MAX)] = {0};
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2013-07-07 19:02:56 -07:00
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2025-04-23 09:00:50 +03:00
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struct debug_control_bitset {
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const char *string;
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uint32_t range[2];
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2025-04-18 11:57:12 -07:00
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};
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2025-04-23 09:00:50 +03:00
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static const struct debug_control_bitset debug_control[] = {
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#define OPT1(name, bit) \
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{ .string = name, .range = { bit, bit }, }
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#define OPT2(name, start, end) \
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{ .string = name, .range = { start, end }, }
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OPT1("tex", DEBUG_TEXTURE),
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OPT1("blit", DEBUG_BLIT),
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OPT1("fall", DEBUG_PERF),
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OPT1("perf", DEBUG_PERF),
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OPT1("perfmon", DEBUG_PERFMON),
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OPT1("bat", DEBUG_BATCH),
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OPT1("buf", DEBUG_BUFMGR),
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OPT1("fs", DEBUG_WM),
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OPT1("gs", DEBUG_GS),
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OPT1("sync", DEBUG_SYNC),
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OPT1("sf", DEBUG_SF),
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OPT1("submit", DEBUG_SUBMIT),
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OPT1("wm", DEBUG_WM),
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OPT1("urb", DEBUG_URB),
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OPT1("vs", DEBUG_VS),
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OPT1("clip", DEBUG_CLIP),
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OPT1("no16", DEBUG_NO16),
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OPT1("blorp", DEBUG_BLORP),
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OPT1("nodualobj", DEBUG_NO_DUAL_OBJECT_GS),
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OPT1("optimizer", DEBUG_OPTIMIZER),
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OPT1("ann", DEBUG_ANNOTATION),
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OPT1("no8", DEBUG_NO8),
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OPT1("no-oaconfig", DEBUG_NO_OACONFIG),
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OPT1("spill_fs", DEBUG_SPILL_FS),
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OPT1("spill_vec4", DEBUG_SPILL_VEC4),
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OPT1("cs", DEBUG_CS),
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OPT1("hex", DEBUG_HEX),
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OPT1("nocompact", DEBUG_NO_COMPACTION),
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OPT1("hs", DEBUG_TCS),
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OPT1("tcs", DEBUG_TCS),
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OPT1("ds", DEBUG_TES),
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OPT1("tes", DEBUG_TES),
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OPT1("l3", DEBUG_L3),
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OPT1("do32", DEBUG_DO32),
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OPT1("norbc", DEBUG_NO_CCS),
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OPT1("noccs", DEBUG_NO_CCS),
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OPT1("nohiz", DEBUG_NO_HIZ),
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OPT1("color", DEBUG_COLOR),
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OPT1("reemit", DEBUG_REEMIT),
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OPT1("soft64", DEBUG_SOFT64),
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OPT1("bt", DEBUG_BT),
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OPT1("pc", DEBUG_PIPE_CONTROL),
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OPT1("nofc", DEBUG_NO_FAST_CLEAR),
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OPT1("no32", DEBUG_NO32),
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OPT2("shaders", DEBUG_VS, DEBUG_RT),
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OPT1("rt", DEBUG_RT),
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OPT1("rt_notrace", DEBUG_RT_NO_TRACE),
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OPT1("bvh_blas", DEBUG_BVH_BLAS),
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OPT1("bvh_tlas", DEBUG_BVH_TLAS),
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OPT1("bvh_blas_ir_hdr", DEBUG_BVH_BLAS_IR_HDR),
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OPT1("bvh_tlas_ir_hdr", DEBUG_BVH_TLAS_IR_HDR),
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OPT1("bvh_blas_ir_as", DEBUG_BVH_BLAS_IR_AS),
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OPT1("bvh_tlas_ir_as", DEBUG_BVH_TLAS_IR_AS),
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OPT1("bvh_no_build", DEBUG_BVH_NO_BUILD),
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OPT1("task", DEBUG_TASK),
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OPT1("mesh", DEBUG_MESH),
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OPT1("stall", DEBUG_STALL),
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OPT1("capture-all", DEBUG_CAPTURE_ALL),
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OPT1("perf-symbol-names", DEBUG_PERF_SYMBOL_NAMES),
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OPT1("swsb-stall", DEBUG_SWSB_STALL),
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OPT1("heaps", DEBUG_HEAPS),
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OPT1("isl", DEBUG_ISL),
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OPT1("sparse", DEBUG_SPARSE),
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OPT1("draw_bkp", DEBUG_DRAW_BKP),
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2025-05-02 16:12:14 +00:00
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OPT1("dispatch_bkp", DEBUG_DISPATCH_BKP),
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2025-04-23 09:00:50 +03:00
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OPT1("bat-stats", DEBUG_BATCH_STATS),
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OPT1("reg-pressure", DEBUG_REG_PRESSURE),
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OPT1("shader-print", DEBUG_SHADER_PRINT),
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OPT1("cl-quiet", DEBUG_CL_QUIET),
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OPT1("no-send-gather", DEBUG_NO_SEND_GATHER),
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2025-06-26 19:36:24 -07:00
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OPT1("no-vrt", DEBUG_NO_VRT),
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2025-04-23 09:00:50 +03:00
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OPT1("shaders-lineno", DEBUG_SHADERS_LINENO),
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OPT1("show_shader_stage", DEBUG_SHOW_SHADER_STAGE),
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{ NULL, }
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#undef OPT1
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#undef OPT2
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2013-07-07 19:02:56 -07:00
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};
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2023-01-21 12:49:44 +01:00
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uint64_t intel_simd = 0;
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static const struct debug_control simd_control[] = {
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{ "fs8", DEBUG_FS_SIMD8 },
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{ "fs16", DEBUG_FS_SIMD16 },
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{ "fs32", DEBUG_FS_SIMD32 },
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2022-06-22 16:40:23 -07:00
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{ "fs2x8", DEBUG_FS_SIMD2X8 },
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2022-06-30 15:46:48 -07:00
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{ "fs4x8", DEBUG_FS_SIMD4X8 },
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{ "fs2x16", DEBUG_FS_SIMD2X16 },
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2023-01-21 12:49:44 +01:00
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{ "cs8", DEBUG_CS_SIMD8 },
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{ "cs16", DEBUG_CS_SIMD16 },
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{ "cs32", DEBUG_CS_SIMD32 },
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{ "ts8", DEBUG_TS_SIMD8 },
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{ "ts16", DEBUG_TS_SIMD16 },
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{ "ts32", DEBUG_TS_SIMD32 },
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{ "ms8", DEBUG_MS_SIMD8 },
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{ "ms16", DEBUG_MS_SIMD16 },
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{ "ms32", DEBUG_MS_SIMD32 },
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{ "rt8", DEBUG_RT_SIMD8 },
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{ "rt16", DEBUG_RT_SIMD16 },
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{ "rt32", DEBUG_RT_SIMD32 },
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{ NULL, 0 }
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};
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2015-02-18 17:31:29 -08:00
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uint64_t
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2025-08-05 15:54:29 +08:00
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intel_debug_flag_for_shader_stage(mesa_shader_stage stage)
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2015-02-18 17:31:29 -08:00
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{
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2014-01-10 21:39:25 -08:00
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uint64_t flags[] = {
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2015-02-18 17:31:29 -08:00
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[MESA_SHADER_VERTEX] = DEBUG_VS,
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2015-07-25 19:28:59 -07:00
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[MESA_SHADER_TESS_CTRL] = DEBUG_TCS,
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[MESA_SHADER_TESS_EVAL] = DEBUG_TES,
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2015-02-18 17:31:29 -08:00
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[MESA_SHADER_GEOMETRY] = DEBUG_GS,
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[MESA_SHADER_FRAGMENT] = DEBUG_WM,
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2014-01-10 21:39:25 -08:00
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[MESA_SHADER_COMPUTE] = DEBUG_CS,
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2020-10-29 09:44:30 -05:00
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[MESA_SHADER_KERNEL] = DEBUG_CS,
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2020-10-21 14:46:39 -05:00
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2021-02-09 20:07:22 -08:00
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[MESA_SHADER_TASK] = DEBUG_TASK,
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[MESA_SHADER_MESH] = DEBUG_MESH,
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2020-10-21 14:46:39 -05:00
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[MESA_SHADER_RAYGEN] = DEBUG_RT,
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[MESA_SHADER_ANY_HIT] = DEBUG_RT,
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[MESA_SHADER_CLOSEST_HIT] = DEBUG_RT,
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[MESA_SHADER_MISS] = DEBUG_RT,
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[MESA_SHADER_INTERSECTION] = DEBUG_RT,
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[MESA_SHADER_CALLABLE] = DEBUG_RT,
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2015-02-18 17:31:29 -08:00
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};
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return flags[stage];
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}
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2022-06-22 16:40:23 -07:00
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#define DEBUG_FS_SIMD (DEBUG_FS_SIMD8 | DEBUG_FS_SIMD16 | \
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DEBUG_FS_SIMD32)
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2023-01-21 12:49:44 +01:00
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#define DEBUG_CS_SIMD (DEBUG_CS_SIMD8 | DEBUG_CS_SIMD16 | DEBUG_CS_SIMD32)
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#define DEBUG_TS_SIMD (DEBUG_TS_SIMD8 | DEBUG_TS_SIMD16 | DEBUG_TS_SIMD32)
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#define DEBUG_MS_SIMD (DEBUG_MS_SIMD8 | DEBUG_MS_SIMD16 | DEBUG_MS_SIMD32)
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#define DEBUG_RT_SIMD (DEBUG_RT_SIMD8 | DEBUG_RT_SIMD16 | DEBUG_RT_SIMD32)
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#define DEBUG_SIMD8_ALL \
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(DEBUG_FS_SIMD8 | \
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DEBUG_CS_SIMD8 | \
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DEBUG_TS_SIMD8 | \
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DEBUG_MS_SIMD8 | \
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DEBUG_RT_SIMD8)
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#define DEBUG_SIMD16_ALL \
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(DEBUG_FS_SIMD16 | \
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DEBUG_CS_SIMD16 | \
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DEBUG_TS_SIMD16 | \
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DEBUG_MS_SIMD16 | \
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DEBUG_RT_SIMD16)
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#define DEBUG_SIMD32_ALL \
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(DEBUG_FS_SIMD32 | \
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DEBUG_CS_SIMD32 | \
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DEBUG_TS_SIMD32 | \
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DEBUG_MS_SIMD32 | \
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DEBUG_RT_SIMD32)
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2024-05-10 08:57:55 +03:00
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uint64_t intel_debug_batch_frame_start = 0;
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uint64_t intel_debug_batch_frame_stop = -1;
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2023-04-24 20:59:15 +00:00
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2023-07-19 10:04:49 -07:00
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uint32_t intel_debug_bkp_before_draw_count = 0;
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uint32_t intel_debug_bkp_after_draw_count = 0;
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2025-05-16 23:28:04 +00:00
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uint32_t intel_shader_dump_filter = 0;
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2023-07-19 10:04:49 -07:00
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2025-05-02 16:12:14 +00:00
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uint32_t intel_debug_bkp_before_dispatch_count = 0;
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uint32_t intel_debug_bkp_after_dispatch_count = 0;
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2025-04-18 14:48:08 -07:00
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static void
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2025-04-23 09:00:50 +03:00
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parse_debug_bitset(const char *env, const struct debug_control_bitset *tbl)
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2025-04-18 14:48:08 -07:00
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{
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/* Check if env is NULL or empty */
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if (!env || !*env)
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return;
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char *copy = strdup(env);
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if (!copy)
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return;
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/* Tokenize the string by space or comma */
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for (char *tok = strtok(copy, ", "); tok; tok = strtok(NULL, ", ")) {
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/* Check for negation prefix, useful if user would like to disable certian flags */
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bool negate = (*tok == '~' || *tok == '-');
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if (negate)
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tok++;
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for (unsigned i = 0; tbl[i].string; i++) {
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if (strcasecmp(tok, tbl[i].string) != 0)
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continue;
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2025-04-23 09:00:50 +03:00
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for (unsigned bit = tbl[i].range[0]; bit <= tbl[i].range[1]; bit++) {
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if (negate)
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BITSET_CLEAR(intel_debug, bit);
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else
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BITSET_SET(intel_debug, bit);
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}
|
2025-04-18 14:48:08 -07:00
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
free(copy);
|
|
|
|
|
}
|
|
|
|
|
|
2017-03-05 23:23:25 +02:00
|
|
|
static void
|
2024-01-19 18:56:18 -08:00
|
|
|
process_intel_debug_variable_once(void)
|
2017-03-05 23:23:25 +02:00
|
|
|
{
|
2025-04-18 14:48:08 -07:00
|
|
|
BITSET_ZERO(intel_debug);
|
|
|
|
|
parse_debug_bitset(getenv("INTEL_DEBUG"), debug_control);
|
|
|
|
|
|
2023-01-21 12:49:44 +01:00
|
|
|
intel_simd = parse_debug_string(getenv("INTEL_SIMD_DEBUG"), simd_control);
|
2023-04-24 20:59:15 +00:00
|
|
|
intel_debug_batch_frame_start =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BATCH_FRAME_START", 0);
|
|
|
|
|
intel_debug_batch_frame_stop =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BATCH_FRAME_STOP", -1);
|
|
|
|
|
|
2023-07-19 10:04:49 -07:00
|
|
|
intel_debug_bkp_before_draw_count =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BKP_BEFORE_DRAW_COUNT", 0);
|
|
|
|
|
intel_debug_bkp_after_draw_count =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BKP_AFTER_DRAW_COUNT", 0);
|
2023-01-21 12:49:44 +01:00
|
|
|
|
2025-05-16 23:28:04 +00:00
|
|
|
intel_shader_dump_filter =
|
|
|
|
|
debug_get_num_option("INTEL_SHADER_DUMP_FILTER", 0);
|
|
|
|
|
|
2025-05-02 16:12:14 +00:00
|
|
|
intel_debug_bkp_before_dispatch_count =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BKP_BEFORE_DISPATCH_COUNT", 0);
|
|
|
|
|
intel_debug_bkp_after_dispatch_count =
|
|
|
|
|
debug_get_num_option("INTEL_DEBUG_BKP_AFTER_DISPATCH_COUNT", 0);
|
|
|
|
|
|
2023-01-21 12:49:44 +01:00
|
|
|
if (!(intel_simd & DEBUG_FS_SIMD))
|
|
|
|
|
intel_simd |= DEBUG_FS_SIMD;
|
|
|
|
|
if (!(intel_simd & DEBUG_CS_SIMD))
|
|
|
|
|
intel_simd |= DEBUG_CS_SIMD;
|
|
|
|
|
if (!(intel_simd & DEBUG_TS_SIMD))
|
|
|
|
|
intel_simd |= DEBUG_TS_SIMD;
|
|
|
|
|
if (!(intel_simd & DEBUG_MS_SIMD))
|
|
|
|
|
intel_simd |= DEBUG_MS_SIMD;
|
|
|
|
|
if (!(intel_simd & DEBUG_RT_SIMD))
|
|
|
|
|
intel_simd |= DEBUG_RT_SIMD;
|
|
|
|
|
|
2025-04-18 14:48:08 -07:00
|
|
|
if (BITSET_TEST(intel_debug, DEBUG_NO8))
|
2023-01-21 12:49:44 +01:00
|
|
|
intel_simd &= ~DEBUG_SIMD8_ALL;
|
2025-04-18 14:48:08 -07:00
|
|
|
|
|
|
|
|
if (BITSET_TEST(intel_debug, DEBUG_NO16))
|
2023-01-21 12:49:44 +01:00
|
|
|
intel_simd &= ~DEBUG_SIMD16_ALL;
|
2025-04-18 14:48:08 -07:00
|
|
|
|
|
|
|
|
if (BITSET_TEST(intel_debug, DEBUG_NO32))
|
2023-01-21 12:49:44 +01:00
|
|
|
intel_simd &= ~DEBUG_SIMD32_ALL;
|
2025-04-18 14:48:08 -07:00
|
|
|
|
|
|
|
|
BITSET_CLEAR(intel_debug, DEBUG_NO8);
|
|
|
|
|
BITSET_CLEAR(intel_debug, DEBUG_NO16);
|
|
|
|
|
BITSET_CLEAR(intel_debug, DEBUG_NO32);
|
2017-03-05 23:23:25 +02:00
|
|
|
}
|
|
|
|
|
|
2013-07-07 19:02:56 -07:00
|
|
|
void
|
2024-01-19 18:56:18 -08:00
|
|
|
process_intel_debug_variable(void)
|
2013-07-07 19:02:56 -07:00
|
|
|
{
|
2017-03-05 23:23:25 +02:00
|
|
|
static once_flag process_intel_debug_variable_flag = ONCE_FLAG_INIT;
|
|
|
|
|
|
|
|
|
|
call_once(&process_intel_debug_variable_flag,
|
2024-01-19 18:56:18 -08:00
|
|
|
process_intel_debug_variable_once);
|
2013-07-07 19:02:56 -07:00
|
|
|
}
|