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intel: Add debug flags for enabling Xe2+ multipolygon fragment shader dispatch modes.
Note that the multipolygon PS disptach modes supported by Xe2 aren't enabled by default yet, but they can be enabled manually via INTEL_SIMD_DEBUG=fs2x8,fs4x8,fs2x16. Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26606>
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2 changed files with 17 additions and 13 deletions
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@ -116,6 +116,8 @@ static const struct debug_control simd_control[] = {
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{ "fs16", DEBUG_FS_SIMD16 },
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{ "fs32", DEBUG_FS_SIMD32 },
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{ "fs2x8", DEBUG_FS_SIMD2X8 },
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{ "fs4x8", DEBUG_FS_SIMD4X8 },
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{ "fs2x16", DEBUG_FS_SIMD2X16 },
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{ "cs8", DEBUG_CS_SIMD8 },
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{ "cs16", DEBUG_CS_SIMD16 },
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{ "cs32", DEBUG_CS_SIMD32 },
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@ -118,24 +118,26 @@ extern uint32_t intel_debug_bkp_after_draw_count;
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#define DEBUG_FS_SIMD16 (1ull << 1)
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#define DEBUG_FS_SIMD32 (1ull << 2)
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#define DEBUG_FS_SIMD2X8 (1ull << 3)
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#define DEBUG_FS_SIMD4X8 (1ull << 4)
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#define DEBUG_FS_SIMD2X16 (1ull << 5)
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#define DEBUG_CS_SIMD8 (1ull << 4)
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#define DEBUG_CS_SIMD16 (1ull << 5)
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#define DEBUG_CS_SIMD32 (1ull << 6)
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#define DEBUG_CS_SIMD8 (1ull << 6)
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#define DEBUG_CS_SIMD16 (1ull << 7)
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#define DEBUG_CS_SIMD32 (1ull << 8)
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#define DEBUG_TS_SIMD8 (1ull << 7)
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#define DEBUG_TS_SIMD16 (1ull << 8)
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#define DEBUG_TS_SIMD32 (1ull << 9)
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#define DEBUG_TS_SIMD8 (1ull << 9)
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#define DEBUG_TS_SIMD16 (1ull << 10)
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#define DEBUG_TS_SIMD32 (1ull << 11)
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#define DEBUG_MS_SIMD8 (1ull << 10)
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#define DEBUG_MS_SIMD16 (1ull << 11)
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#define DEBUG_MS_SIMD32 (1ull << 12)
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#define DEBUG_MS_SIMD8 (1ull << 12)
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#define DEBUG_MS_SIMD16 (1ull << 13)
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#define DEBUG_MS_SIMD32 (1ull << 14)
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#define DEBUG_RT_SIMD8 (1ull << 13)
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#define DEBUG_RT_SIMD16 (1ull << 14)
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#define DEBUG_RT_SIMD32 (1ull << 15)
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#define DEBUG_RT_SIMD8 (1ull << 15)
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#define DEBUG_RT_SIMD16 (1ull << 16)
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#define DEBUG_RT_SIMD32 (1ull << 17)
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#define SIMD_DISK_CACHE_MASK ((1ull << 16) - 1)
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#define SIMD_DISK_CACHE_MASK ((1ull << 18) - 1)
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#ifdef HAVE_ANDROID_PLATFORM
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#define LOG_TAG "INTEL-MESA"
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