2021-04-24 19:13:29 -04:00
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/*
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* Copyright (C) 2017-2019 Alyssa Rosenzweig
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* Copyright (C) 2017-2019 Connor Abbott
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* Copyright (C) 2019 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <agx_pack.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <memory.h>
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#include <stdbool.h>
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#include <stdarg.h>
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#include <ctype.h>
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#include <sys/mman.h>
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#include "decode.h"
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#include "io.h"
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#include "hexdump.h"
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static const char *agx_alloc_types[AGX_NUM_ALLOC] = { "mem", "map", "cmd" };
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static void
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agx_disassemble(void *_code, size_t maxlen, FILE *fp)
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{
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/* stub */
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}
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FILE *agxdecode_dump_stream;
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#define MAX_MAPPINGS 4096
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struct agx_bo mmap_array[MAX_MAPPINGS];
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unsigned mmap_count = 0;
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struct agx_bo *ro_mappings[MAX_MAPPINGS];
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unsigned ro_mapping_count = 0;
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static struct agx_bo *
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agxdecode_find_mapped_gpu_mem_containing_rw(uint64_t addr)
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{
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for (unsigned i = 0; i < mmap_count; ++i) {
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if (mmap_array[i].type == AGX_ALLOC_REGULAR && addr >= mmap_array[i].ptr.gpu && (addr - mmap_array[i].ptr.gpu) < mmap_array[i].size)
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return mmap_array + i;
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}
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return NULL;
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}
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static struct agx_bo *
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agxdecode_find_mapped_gpu_mem_containing(uint64_t addr)
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{
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struct agx_bo *mem = agxdecode_find_mapped_gpu_mem_containing_rw(addr);
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if (mem && mem->ptr.cpu && !mem->ro) {
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mprotect(mem->ptr.cpu, mem->size, PROT_READ);
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mem->ro = true;
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ro_mappings[ro_mapping_count++] = mem;
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assert(ro_mapping_count < MAX_MAPPINGS);
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}
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if (mem && !mem->mapped) {
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fprintf(stderr, "[ERROR] access to memory not mapped (GPU %" PRIx64 ", handle %u)\n", mem->ptr.gpu, mem->handle);
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}
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return mem;
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}
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static struct agx_bo *
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agxdecode_find_handle(unsigned handle, unsigned type)
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{
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for (unsigned i = 0; i < mmap_count; ++i) {
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if (mmap_array[i].type != type)
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continue;
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if (mmap_array[i].handle != handle)
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continue;
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return &mmap_array[i];
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}
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return NULL;
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}
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2021-07-10 12:05:34 -04:00
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static void
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agxdecode_mark_mapped(unsigned handle)
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{
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struct agx_bo *bo = agxdecode_find_handle(handle, AGX_ALLOC_REGULAR);
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if (!bo) {
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fprintf(stderr, "ERROR - unknown BO mapped with handle %u\n", handle);
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return;
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}
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/* Mark mapped for future consumption */
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bo->mapped = true;
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}
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2021-04-24 19:13:29 -04:00
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static void
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2022-04-02 22:14:11 -04:00
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agxdecode_decode_segment_list(void *segment_list)
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2021-04-24 19:13:29 -04:00
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{
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2021-07-10 12:05:34 -04:00
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unsigned nr_handles = 0;
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2021-04-24 19:13:29 -04:00
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/* First, mark everything unmapped */
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for (unsigned i = 0; i < mmap_count; ++i)
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mmap_array[i].mapped = false;
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/* Check the header */
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2022-04-02 22:14:11 -04:00
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struct agx_map_header *hdr = segment_list;
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2022-04-02 21:55:25 -04:00
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if (hdr->resource_group_count == 0) {
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2022-04-02 22:14:11 -04:00
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fprintf(agxdecode_dump_stream, "ERROR - empty map\n");
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2021-04-24 19:13:29 -04:00
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return;
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}
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2022-04-02 22:14:11 -04:00
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if (hdr->segment_count != 1) {
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fprintf(agxdecode_dump_stream, "ERROR - can't handle segment count %u\n",
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hdr->segment_count);
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}
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fprintf(agxdecode_dump_stream, "Segment list:\n");
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fprintf(agxdecode_dump_stream, " Command buffer shmem ID: %" PRIx64 "\n", hdr->cmdbuf_id);
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fprintf(agxdecode_dump_stream, " Encoder ID: %" PRIx64 "\n", hdr->encoder_id);
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fprintf(agxdecode_dump_stream, " Kernel commands start offset: %u\n",
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hdr->kernel_commands_start_offset);
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fprintf(agxdecode_dump_stream, " Kernel commands end offset: %u\n",
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hdr->kernel_commands_end_offset);
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2022-04-02 22:18:01 -04:00
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fprintf(agxdecode_dump_stream, " Unknown: 0x%X\n", hdr->unk);
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2022-04-02 22:14:11 -04:00
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2022-04-02 22:21:15 -04:00
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/* Expected structure: header followed by resource groups */
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size_t length = sizeof(struct agx_map_header);
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length += sizeof(struct agx_map_entry) * hdr->resource_group_count;
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if (length != hdr->length) {
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fprintf(agxdecode_dump_stream, "ERROR: expected length %zu, got %u\n",
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length, hdr->length);
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}
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2022-04-02 22:14:11 -04:00
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if (hdr->padding[0] || hdr->padding[1])
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fprintf(agxdecode_dump_stream, "ERROR - padding tripped\n");
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2021-04-24 19:13:29 -04:00
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/* Check the entries */
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2022-04-02 22:14:11 -04:00
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struct agx_map_entry *groups = ((void *) hdr) + sizeof(*hdr);
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2022-04-02 21:55:25 -04:00
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for (unsigned i = 0; i < hdr->resource_group_count; ++i) {
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2022-04-02 22:14:11 -04:00
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struct agx_map_entry group = groups[i];
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unsigned count = group.resource_count;
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STATIC_ASSERT(ARRAY_SIZE(group.resource_id) == 6);
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STATIC_ASSERT(ARRAY_SIZE(group.resource_unk) == 6);
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STATIC_ASSERT(ARRAY_SIZE(group.resource_flags) == 6);
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if ((count < 1) || (count > 6)) {
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fprintf(agxdecode_dump_stream, "ERROR - invalid count %u\n", count);
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continue;
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}
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2021-07-10 12:05:34 -04:00
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2022-04-02 22:14:11 -04:00
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for (unsigned j = 0; j < count; ++j) {
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unsigned handle = group.resource_id[j];
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unsigned unk = group.resource_unk[j];
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unsigned flags = group.resource_flags[j];
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if (!handle) {
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fprintf(agxdecode_dump_stream, "ERROR - invalid handle %u\n", handle);
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continue;
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2021-07-10 12:05:34 -04:00
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}
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2022-04-02 22:14:11 -04:00
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agxdecode_mark_mapped(handle);
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nr_handles++;
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fprintf(agxdecode_dump_stream, "%u (0x%X, 0x%X)\n", handle, unk, flags);
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2021-04-24 19:13:29 -04:00
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}
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2022-04-02 22:14:11 -04:00
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if (group.unka)
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fprintf(agxdecode_dump_stream, "ERROR - unknown 0x%X\n", group.unka);
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/* Visual separator for resource groups */
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fprintf(agxdecode_dump_stream, "\n");
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2021-04-24 19:13:29 -04:00
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}
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2021-07-10 12:05:34 -04:00
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/* Check the handle count */
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2022-04-02 21:55:25 -04:00
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if (nr_handles != hdr->total_resources) {
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2022-04-02 22:14:11 -04:00
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fprintf(agxdecode_dump_stream, "ERROR - wrong handle count, got %u, expected %u (%u entries)\n",
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2022-04-02 21:55:25 -04:00
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nr_handles, hdr->total_resources, hdr->resource_group_count);
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2021-07-10 12:05:34 -04:00
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}
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2021-04-24 19:13:29 -04:00
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}
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static inline void *
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__agxdecode_fetch_gpu_mem(const struct agx_bo *mem,
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uint64_t gpu_va, size_t size,
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int line, const char *filename)
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{
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if (!mem)
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mem = agxdecode_find_mapped_gpu_mem_containing(gpu_va);
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if (!mem) {
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fprintf(stderr, "Access to unknown memory %" PRIx64 " in %s:%d\n",
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gpu_va, filename, line);
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fflush(agxdecode_dump_stream);
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assert(0);
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}
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assert(mem);
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assert(size + (gpu_va - mem->ptr.gpu) <= mem->size);
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return mem->ptr.cpu + gpu_va - mem->ptr.gpu;
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}
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#define agxdecode_fetch_gpu_mem(gpu_va, size) \
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__agxdecode_fetch_gpu_mem(NULL, gpu_va, size, __LINE__, __FILE__)
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static void
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agxdecode_map_read_write(void)
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{
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for (unsigned i = 0; i < ro_mapping_count; ++i) {
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ro_mappings[i]->ro = false;
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mprotect(ro_mappings[i]->ptr.cpu, ro_mappings[i]->size,
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PROT_READ | PROT_WRITE);
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}
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ro_mapping_count = 0;
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}
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/* Helpers for parsing the cmdstream */
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#define DUMP_UNPACKED(T, var, str) { \
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agxdecode_log(str); \
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agx_print(agxdecode_dump_stream, T, var, (agxdecode_indent + 1) * 2); \
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}
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#define DUMP_CL(T, cl, str) {\
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agx_unpack(agxdecode_dump_stream, cl, T, temp); \
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DUMP_UNPACKED(T, temp, str "\n"); \
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}
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#define agxdecode_log(str) fputs(str, agxdecode_dump_stream)
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#define agxdecode_msg(str) fprintf(agxdecode_dump_stream, "// %s", str)
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unsigned agxdecode_indent = 0;
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static void
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agxdecode_dump_bo(struct agx_bo *bo, const char *name)
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{
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fprintf(agxdecode_dump_stream, "%s %s (%u)\n", name, bo->name ?: "", bo->handle);
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hexdump(agxdecode_dump_stream, bo->ptr.cpu, bo->size, false);
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}
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/* Abstraction for command stream parsing */
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2022-09-05 17:43:34 -04:00
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typedef unsigned (*decode_cmd)(const uint8_t *map, uint64_t *link, bool verbose);
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2021-04-24 19:13:29 -04:00
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#define STATE_DONE (0xFFFFFFFFu)
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2022-09-05 17:43:34 -04:00
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#define STATE_LINK (0xFFFFFFFEu)
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2021-04-24 19:13:29 -04:00
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static void
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agxdecode_stateful(uint64_t va, const char *label, decode_cmd decoder, bool verbose)
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{
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struct agx_bo *alloc = agxdecode_find_mapped_gpu_mem_containing(va);
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assert(alloc != NULL && "nonexistant object");
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fprintf(agxdecode_dump_stream, "%s (%" PRIx64 ", handle %u)\n", label, va, alloc->handle);
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fflush(agxdecode_dump_stream);
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uint8_t *map = agxdecode_fetch_gpu_mem(va, 64);
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uint8_t *end = (uint8_t *) alloc->ptr.cpu + alloc->size;
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2022-09-05 17:43:34 -04:00
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uint64_t link = 0;
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2021-04-24 19:13:29 -04:00
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if (verbose)
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agxdecode_dump_bo(alloc, label);
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fflush(agxdecode_dump_stream);
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while (map < end) {
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2022-09-05 17:43:34 -04:00
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unsigned count = decoder(map, &link, verbose);
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2021-04-24 19:13:29 -04:00
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/* If we fail to decode, default to a hexdump (don't hang) */
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if (count == 0) {
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hexdump(agxdecode_dump_stream, map, 8, false);
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count = 8;
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}
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map += count;
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|
|
|
fflush(agxdecode_dump_stream);
|
|
|
|
|
|
2022-09-05 17:43:34 -04:00
|
|
|
if (count == STATE_DONE) {
|
2021-04-24 19:13:29 -04:00
|
|
|
break;
|
2022-09-05 17:43:34 -04:00
|
|
|
} else if (count == STATE_LINK) {
|
|
|
|
|
alloc = agxdecode_find_mapped_gpu_mem_containing(link);
|
|
|
|
|
map = agxdecode_fetch_gpu_mem(link, 64);
|
|
|
|
|
end = (uint8_t *) alloc->ptr.cpu + alloc->size;
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_usc(const uint8_t *map, UNUSED uint64_t *link, UNUSED bool verbose)
|
2021-04-24 19:13:29 -04:00
|
|
|
{
|
2022-09-17 11:22:01 -04:00
|
|
|
enum agx_usc_control type = map[0];
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
#define USC_CASE(name, human) \
|
|
|
|
|
case AGX_USC_CONTROL_##name: { \
|
|
|
|
|
DUMP_CL(USC_##name, map, human); \
|
|
|
|
|
return AGX_USC_##name##_LENGTH; \
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
switch (type) {
|
|
|
|
|
case AGX_USC_CONTROL_NO_PRESHADER: {
|
|
|
|
|
DUMP_CL(USC_NO_PRESHADER, map, "No preshader");
|
|
|
|
|
return STATE_DONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case AGX_USC_CONTROL_PRESHADER: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, USC_PRESHADER, ctrl);
|
|
|
|
|
DUMP_UNPACKED(USC_PRESHADER, ctrl, "Preshader\n");
|
|
|
|
|
|
|
|
|
|
agx_disassemble(agxdecode_fetch_gpu_mem(ctrl.code, 2048),
|
|
|
|
|
8192, agxdecode_dump_stream);
|
|
|
|
|
|
|
|
|
|
return STATE_DONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case AGX_USC_CONTROL_SHADER: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, USC_SHADER, ctrl);
|
|
|
|
|
DUMP_UNPACKED(USC_SHADER, ctrl, "Shader\n");
|
2021-04-24 19:13:29 -04:00
|
|
|
|
|
|
|
|
agxdecode_log("\n");
|
2022-09-17 11:22:01 -04:00
|
|
|
agx_disassemble(agxdecode_fetch_gpu_mem(ctrl.code, 2048),
|
|
|
|
|
8192, agxdecode_dump_stream);
|
2021-04-24 19:13:29 -04:00
|
|
|
agxdecode_log("\n");
|
|
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
return AGX_USC_SHADER_LENGTH;
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
case AGX_USC_CONTROL_SAMPLER: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, USC_SAMPLER, temp);
|
|
|
|
|
DUMP_UNPACKED(USC_SAMPLER, temp, "Sampler state\n");
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
uint8_t *samp = agxdecode_fetch_gpu_mem(temp.buffer,
|
|
|
|
|
AGX_SAMPLER_LENGTH * temp.count);
|
|
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < temp.count; ++i) {
|
|
|
|
|
DUMP_CL(SAMPLER, samp, "Sampler");
|
|
|
|
|
samp += AGX_SAMPLER_LENGTH;
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
return AGX_USC_SAMPLER_LENGTH;
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
case AGX_USC_CONTROL_TEXTURE: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, USC_TEXTURE, temp);
|
|
|
|
|
DUMP_UNPACKED(USC_TEXTURE, temp, "Texture state\n");
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-05-22 23:02:29 -04:00
|
|
|
uint8_t *tex = agxdecode_fetch_gpu_mem(temp.buffer,
|
|
|
|
|
AGX_TEXTURE_LENGTH * temp.count);
|
|
|
|
|
|
|
|
|
|
/* Note: samplers only need 8 byte alignment? */
|
|
|
|
|
for (unsigned i = 0; i < temp.count; ++i) {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, tex, TEXTURE, t);
|
|
|
|
|
DUMP_CL(TEXTURE, tex, "Texture");
|
|
|
|
|
DUMP_CL(RENDER_TARGET, tex, "Render target");
|
|
|
|
|
|
|
|
|
|
tex += AGX_TEXTURE_LENGTH;
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
return AGX_USC_TEXTURE_LENGTH;
|
|
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
USC_CASE(FRAGMENT_PROPERTIES, "Fragment properties");
|
|
|
|
|
USC_CASE(UNIFORM, "Uniform");
|
2022-10-16 20:47:18 -04:00
|
|
|
USC_CASE(UNIFORM_HIGH, "Uniform high");
|
2022-09-17 11:22:01 -04:00
|
|
|
USC_CASE(SHARED, "Shared");
|
|
|
|
|
USC_CASE(REGISTERS, "Registers");
|
2022-05-22 23:02:29 -04:00
|
|
|
|
2022-09-17 11:22:01 -04:00
|
|
|
default:
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Unknown USC control type: %u\n",
|
|
|
|
|
type);
|
|
|
|
|
hexdump(agxdecode_dump_stream, map, 8, false);
|
|
|
|
|
return 8;
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
2022-09-17 11:22:01 -04:00
|
|
|
|
|
|
|
|
#undef USC_CASE
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
|
asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).
Names are from the PowerVR code in Mesa where sensible.
Once we've reworked the XML, we need to rework the decoder. Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.
Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-04 15:17:22 -04:00
|
|
|
#define PPP_PRINT(map, header_name, struct_name, human) \
|
|
|
|
|
if (hdr.header_name) { \
|
|
|
|
|
assert(((map + AGX_##struct_name##_LENGTH) <= (base + size)) && \
|
|
|
|
|
"buffer overrun in PPP update"); \
|
|
|
|
|
DUMP_CL(struct_name, map, human); \
|
|
|
|
|
map += AGX_##struct_name##_LENGTH; \
|
|
|
|
|
}
|
|
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
static void
|
|
|
|
|
agxdecode_record(uint64_t va, size_t size, bool verbose)
|
|
|
|
|
{
|
asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).
Names are from the PowerVR code in Mesa where sensible.
Once we've reworked the XML, we need to rework the decoder. Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.
Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-04 15:17:22 -04:00
|
|
|
uint8_t *base = agxdecode_fetch_gpu_mem(va, size);
|
|
|
|
|
uint8_t *map = base;
|
|
|
|
|
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, PPP_HEADER, hdr);
|
|
|
|
|
map += AGX_PPP_HEADER_LENGTH;
|
|
|
|
|
|
|
|
|
|
PPP_PRINT(map, fragment_control, FRAGMENT_CONTROL, "Fragment control");
|
|
|
|
|
PPP_PRINT(map, fragment_control_2, FRAGMENT_CONTROL_2, "Fragment control 2");
|
|
|
|
|
PPP_PRINT(map, fragment_front_face, FRAGMENT_FACE, "Front face");
|
|
|
|
|
PPP_PRINT(map, fragment_front_face_2, FRAGMENT_FACE_2, "Front face 2");
|
|
|
|
|
PPP_PRINT(map, fragment_front_stencil, FRAGMENT_STENCIL, "Front stencil");
|
|
|
|
|
PPP_PRINT(map, fragment_back_face, FRAGMENT_FACE, "Back face");
|
|
|
|
|
PPP_PRINT(map, fragment_back_face_2, FRAGMENT_FACE_2, "Back face 2");
|
|
|
|
|
PPP_PRINT(map, fragment_back_stencil, FRAGMENT_STENCIL, "Back stencil");
|
|
|
|
|
PPP_PRINT(map, depth_bias_scissor, DEPTH_BIAS_SCISSOR, "Depth bias/scissor");
|
|
|
|
|
PPP_PRINT(map, region_clip, REGION_CLIP, "Region clip");
|
|
|
|
|
PPP_PRINT(map, viewport, VIEWPORT, "Viewport");
|
|
|
|
|
PPP_PRINT(map, w_clamp, W_CLAMP, "W clamp");
|
|
|
|
|
PPP_PRINT(map, output_select, OUTPUT_SELECT, "Output select");
|
|
|
|
|
PPP_PRINT(map, varying_word_0, VARYING_0, "Varying word 0");
|
|
|
|
|
PPP_PRINT(map, varying_word_1, VARYING_1, "Varying word 1");
|
|
|
|
|
PPP_PRINT(map, cull, CULL, "Cull");
|
|
|
|
|
PPP_PRINT(map, cull_2, CULL_2, "Cull 2");
|
|
|
|
|
|
|
|
|
|
if (hdr.fragment_shader) {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, FRAGMENT_SHADER, frag);
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_stateful(frag.pipeline, "Fragment pipeline", agxdecode_usc, verbose);
|
asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).
Names are from the PowerVR code in Mesa where sensible.
Once we've reworked the XML, we need to rework the decoder. Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.
Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-04 15:17:22 -04:00
|
|
|
|
|
|
|
|
if (frag.cf_bindings) {
|
|
|
|
|
uint8_t *cf = agxdecode_fetch_gpu_mem(frag.cf_bindings, 128);
|
|
|
|
|
hexdump(agxdecode_dump_stream, cf, 128, false);
|
|
|
|
|
|
|
|
|
|
DUMP_CL(CF_BINDING_HEADER, cf, "Coefficient binding header:");
|
|
|
|
|
cf += AGX_CF_BINDING_HEADER_LENGTH;
|
|
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < frag.cf_binding_count; ++i) {
|
|
|
|
|
DUMP_CL(CF_BINDING, cf, "Coefficient binding:");
|
|
|
|
|
cf += AGX_CF_BINDING_LENGTH;
|
2021-07-11 17:05:03 -04:00
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
|
asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).
Names are from the PowerVR code in Mesa where sensible.
Once we've reworked the XML, we need to rework the decoder. Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.
Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-04 15:17:22 -04:00
|
|
|
DUMP_UNPACKED(FRAGMENT_SHADER, frag, "Fragment shader\n");
|
|
|
|
|
map += AGX_FRAGMENT_SHADER_LENGTH;
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
asahi: Match PPP data structures with PowerVR
Looking at PowerVR's PPP definitions in tree in Mesa
(src/imagination/csbgen/), we find that AGX's "tagged" data structures
are actually sequences of state items prefixed by a header specifying
which state follows. Rather than hardcoding the sequences in which Apple's
driver chooses to bundle state, we need the XML to be flexible enough to
encode or decode any valid combination of state. That means reworking
the XML. While doing so, we find a number of fields that are identical
between RGX and AGX, and fix the names while at it (for example, the W
Clamp floating point).
Names are from the PowerVR code in Mesa where sensible.
Once we've reworked the XML, we need to rework the decoder. Instead of
reading tags and printing the combined state packets, the decoder now
must unpack the header and print the individual state items specified by
the header, with slightly more complicated bounds checking.
Finally, state emission in the driver becomes much more flexible. To
prove the flexibility actually works, we now emit all PPP state (except for
viewport and scissor state) as a single PPP update. This works. After
this we can move onto more interesting arrangements of state for lower
driver overhead.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18421>
2022-09-04 15:17:22 -04:00
|
|
|
|
|
|
|
|
PPP_PRINT(map, occlusion_query, FRAGMENT_OCCLUSION_QUERY, "Occlusion query");
|
|
|
|
|
PPP_PRINT(map, occlusion_query_2, FRAGMENT_OCCLUSION_QUERY_2, "Occlusion query 2");
|
|
|
|
|
PPP_PRINT(map, output_unknown, OUTPUT_UNKNOWN, "Output unknown");
|
|
|
|
|
PPP_PRINT(map, output_size, OUTPUT_SIZE, "Output size");
|
|
|
|
|
PPP_PRINT(map, varying_word_2, VARYING_2, "Varying word 2");
|
|
|
|
|
|
|
|
|
|
/* PPP print checks we don't read too much, now check we read enough */
|
|
|
|
|
assert(map == (base + size) && "invalid size of PPP update");
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned
|
2022-09-12 22:34:12 -04:00
|
|
|
agxdecode_cdm(const uint8_t *map, uint64_t *link, bool verbose)
|
2021-04-24 19:13:29 -04:00
|
|
|
{
|
2022-09-12 22:34:12 -04:00
|
|
|
/* Bits 29-31 contain the block type */
|
|
|
|
|
enum agx_cdm_block_type block_type = (map[3] >> 5);
|
|
|
|
|
|
|
|
|
|
switch (block_type) {
|
|
|
|
|
case AGX_CDM_BLOCK_TYPE_COMPUTE_KERNEL: {
|
2021-04-24 19:13:29 -04:00
|
|
|
agx_unpack(agxdecode_dump_stream, map, LAUNCH, cmd);
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_stateful(cmd.pipeline, "Pipeline", agxdecode_usc, verbose);
|
2021-04-24 19:13:29 -04:00
|
|
|
DUMP_UNPACKED(LAUNCH, cmd, "Launch\n");
|
|
|
|
|
return AGX_LAUNCH_LENGTH;
|
2022-09-05 15:49:39 -04:00
|
|
|
}
|
|
|
|
|
|
2022-09-12 22:34:12 -04:00
|
|
|
case AGX_CDM_BLOCK_TYPE_STREAM_LINK: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, CDM_STREAM_LINK, hdr);
|
|
|
|
|
DUMP_UNPACKED(CDM_STREAM_LINK, hdr, "Stream Link\n");
|
|
|
|
|
*link = hdr.target_lo | (((uint64_t) hdr.target_hi) << 32);
|
|
|
|
|
return STATE_LINK;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case AGX_CDM_BLOCK_TYPE_STREAM_TERMINATE: {
|
|
|
|
|
DUMP_CL(CDM_STREAM_TERMINATE, map, "Stream Terminate");
|
|
|
|
|
return STATE_DONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Unknown CDM block type: %u\n",
|
|
|
|
|
block_type);
|
|
|
|
|
hexdump(agxdecode_dump_stream, map, 8, false);
|
|
|
|
|
return 8;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static unsigned
|
|
|
|
|
agxdecode_vdm(const uint8_t *map, uint64_t *link, bool verbose)
|
|
|
|
|
{
|
2022-09-05 15:49:39 -04:00
|
|
|
/* Bits 29-31 contain the block type */
|
|
|
|
|
enum agx_vdm_block_type block_type = (map[3] >> 5);
|
|
|
|
|
|
|
|
|
|
switch (block_type) {
|
|
|
|
|
case AGX_VDM_BLOCK_TYPE_PPP_STATE_UPDATE: {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, PPP_STATE, cmd);
|
2021-07-10 12:30:09 -04:00
|
|
|
|
2021-11-13 14:52:52 -05:00
|
|
|
uint64_t address = (((uint64_t) cmd.pointer_hi) << 32) | cmd.pointer_lo;
|
|
|
|
|
struct agx_bo *mem = agxdecode_find_mapped_gpu_mem_containing(address);
|
2021-04-24 19:13:29 -04:00
|
|
|
|
|
|
|
|
if (mem)
|
2021-11-13 14:52:52 -05:00
|
|
|
agxdecode_record(address, cmd.size_words * 4, verbose);
|
2021-04-24 19:13:29 -04:00
|
|
|
else
|
2022-09-05 15:49:39 -04:00
|
|
|
DUMP_UNPACKED(PPP_STATE, cmd, "Non-existant record (XXX)\n");
|
|
|
|
|
|
|
|
|
|
return AGX_PPP_STATE_LENGTH;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case AGX_VDM_BLOCK_TYPE_VDM_STATE_UPDATE: {
|
|
|
|
|
size_t length = AGX_VDM_STATE_LENGTH;
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, VDM_STATE, hdr);
|
|
|
|
|
map += AGX_VDM_STATE_LENGTH;
|
|
|
|
|
|
|
|
|
|
#define VDM_PRINT(header_name, STRUCT_NAME, human) \
|
|
|
|
|
if (hdr.header_name##_present) { \
|
|
|
|
|
DUMP_CL(VDM_STATE_##STRUCT_NAME, map, human); \
|
|
|
|
|
map += AGX_VDM_STATE_##STRUCT_NAME##_LENGTH; \
|
|
|
|
|
length += AGX_VDM_STATE_##STRUCT_NAME##_LENGTH; \
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
VDM_PRINT(restart_index, RESTART_INDEX, "Restart index");
|
|
|
|
|
VDM_PRINT(vertex_shader_word_0, VERTEX_SHADER_WORD_0, "Vertex shader word 0");
|
|
|
|
|
|
|
|
|
|
if (hdr.vertex_shader_word_1_present) {
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, VDM_STATE_VERTEX_SHADER_WORD_1,
|
|
|
|
|
word_1);
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Pipeline %X\n", (uint32_t) word_1.pipeline);
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_stateful(word_1.pipeline, "Pipeline", agxdecode_usc, verbose);
|
2022-09-05 15:49:39 -04:00
|
|
|
}
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2022-09-05 15:49:39 -04:00
|
|
|
VDM_PRINT(vertex_shader_word_1, VERTEX_SHADER_WORD_1, "Vertex shader word 1");
|
|
|
|
|
VDM_PRINT(vertex_outputs, VERTEX_OUTPUTS, "Vertex outputs");
|
|
|
|
|
VDM_PRINT(vertex_unknown, VERTEX_UNKNOWN, "Vertex unknown");
|
|
|
|
|
|
|
|
|
|
#undef VDM_PRINT
|
|
|
|
|
return ALIGN_POT(length, 8);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
case AGX_VDM_BLOCK_TYPE_INDEX_LIST: {
|
|
|
|
|
size_t length = AGX_INDEX_LIST_LENGTH;
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, map, INDEX_LIST, hdr);
|
|
|
|
|
DUMP_UNPACKED(INDEX_LIST, hdr, "Index List\n");
|
|
|
|
|
map += AGX_INDEX_LIST_LENGTH;
|
|
|
|
|
|
|
|
|
|
#define IDX_PRINT(header_name, STRUCT_NAME, human) \
|
|
|
|
|
if (hdr.header_name##_present) { \
|
|
|
|
|
DUMP_CL(INDEX_LIST_##STRUCT_NAME, map, human); \
|
|
|
|
|
map += AGX_INDEX_LIST_##STRUCT_NAME##_LENGTH; \
|
|
|
|
|
length += AGX_INDEX_LIST_##STRUCT_NAME##_LENGTH; \
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
IDX_PRINT(index_buffer, BUFFER_LO, "Index buffer");
|
|
|
|
|
IDX_PRINT(index_count, COUNT, "Index count");
|
|
|
|
|
IDX_PRINT(instance_count, INSTANCES, "Instance count");
|
|
|
|
|
IDX_PRINT(start, START, "Start");
|
2022-11-08 15:07:24 -05:00
|
|
|
IDX_PRINT(index_buffer_size, BUFFER_SIZE, "Index buffer size");
|
2022-09-05 15:49:39 -04:00
|
|
|
|
|
|
|
|
#undef IDX_PRINT
|
|
|
|
|
return ALIGN_POT(length, 8);
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-05 17:43:34 -04:00
|
|
|
case AGX_VDM_BLOCK_TYPE_STREAM_LINK: {
|
2022-09-12 22:22:56 -04:00
|
|
|
agx_unpack(agxdecode_dump_stream, map, VDM_STREAM_LINK, hdr);
|
|
|
|
|
DUMP_UNPACKED(VDM_STREAM_LINK, hdr, "Stream Link\n");
|
2022-09-05 17:43:34 -04:00
|
|
|
*link = hdr.target_lo | (((uint64_t) hdr.target_hi) << 32);
|
|
|
|
|
return STATE_LINK;
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-05 15:49:39 -04:00
|
|
|
case AGX_VDM_BLOCK_TYPE_STREAM_TERMINATE: {
|
2022-09-12 22:22:56 -04:00
|
|
|
DUMP_CL(VDM_STREAM_TERMINATE, map, "Stream Terminate");
|
2021-04-24 19:13:29 -04:00
|
|
|
return STATE_DONE;
|
2022-09-05 15:49:39 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
default:
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Unknown VDM block type: %u\n",
|
|
|
|
|
block_type);
|
|
|
|
|
hexdump(agxdecode_dump_stream, map, 8, false);
|
|
|
|
|
return 8;
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-14 20:08:23 -04:00
|
|
|
static void
|
|
|
|
|
agxdecode_cs(uint32_t *cmdbuf, uint64_t encoder, bool verbose)
|
|
|
|
|
{
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, cmdbuf + 16, IOGPU_COMPUTE, cs);
|
|
|
|
|
DUMP_UNPACKED(IOGPU_COMPUTE, cs, "Compute\n");
|
|
|
|
|
|
|
|
|
|
agxdecode_stateful(encoder, "Encoder", agxdecode_cdm, verbose);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
agxdecode_gfx(uint32_t *cmdbuf, uint64_t encoder, bool verbose)
|
|
|
|
|
{
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, cmdbuf + 16, IOGPU_GRAPHICS, gfx);
|
|
|
|
|
DUMP_UNPACKED(IOGPU_GRAPHICS, gfx, "Graphics\n");
|
|
|
|
|
|
|
|
|
|
agxdecode_stateful(encoder, "Encoder", agxdecode_vdm, verbose);
|
|
|
|
|
|
|
|
|
|
if (gfx.clear_pipeline_unk) {
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Unk: %X\n", gfx.clear_pipeline_unk);
|
|
|
|
|
agxdecode_stateful(gfx.clear_pipeline, "Clear pipeline",
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_usc, verbose);
|
2022-09-14 20:08:23 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (gfx.store_pipeline_unk) {
|
|
|
|
|
assert(gfx.store_pipeline_unk == 0x4);
|
|
|
|
|
agxdecode_stateful(gfx.store_pipeline, "Store pipeline",
|
2022-09-17 11:22:01 -04:00
|
|
|
agxdecode_usc, verbose);
|
2022-09-14 20:08:23 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
assert((gfx.partial_reload_pipeline_unk & 0xF) == 0x4);
|
|
|
|
|
if (gfx.partial_reload_pipeline) {
|
|
|
|
|
agxdecode_stateful(gfx.partial_reload_pipeline,
|
2022-09-17 11:22:01 -04:00
|
|
|
"Partial reload pipeline", agxdecode_usc, verbose);
|
2022-09-14 20:08:23 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (gfx.partial_store_pipeline) {
|
|
|
|
|
agxdecode_stateful(gfx.partial_store_pipeline,
|
2022-09-17 11:22:01 -04:00
|
|
|
"Partial store pipeline", agxdecode_usc, verbose);
|
2022-09-14 20:08:23 -04:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
void
|
|
|
|
|
agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose)
|
|
|
|
|
{
|
|
|
|
|
agxdecode_dump_file_open();
|
|
|
|
|
|
|
|
|
|
struct agx_bo *cmdbuf = agxdecode_find_handle(cmdbuf_handle, AGX_ALLOC_CMDBUF);
|
|
|
|
|
struct agx_bo *map = agxdecode_find_handle(map_handle, AGX_ALLOC_MEMMAP);
|
|
|
|
|
assert(cmdbuf != NULL && "nonexistant command buffer");
|
|
|
|
|
assert(map != NULL && "nonexistant mapping");
|
|
|
|
|
|
|
|
|
|
/* Before decoding anything, validate the map. Set bo->mapped fields */
|
2022-04-02 22:14:11 -04:00
|
|
|
agxdecode_decode_segment_list(map->ptr.cpu);
|
2021-04-24 19:13:29 -04:00
|
|
|
|
2021-07-11 14:48:03 -04:00
|
|
|
/* Print the IOGPU stuff */
|
|
|
|
|
agx_unpack(agxdecode_dump_stream, cmdbuf->ptr.cpu, IOGPU_HEADER, cmd);
|
|
|
|
|
DUMP_UNPACKED(IOGPU_HEADER, cmd, "IOGPU Header\n");
|
|
|
|
|
|
2022-04-02 12:35:57 -04:00
|
|
|
DUMP_CL(IOGPU_ATTACHMENT_COUNT, ((uint8_t *) cmdbuf->ptr.cpu +
|
|
|
|
|
cmd.attachment_offset), "Attachment count");
|
|
|
|
|
|
2022-03-20 21:03:00 -04:00
|
|
|
uint32_t *attachments = (uint32_t *) ((uint8_t *) cmdbuf->ptr.cpu + cmd.attachment_offset);
|
2021-07-11 14:48:03 -04:00
|
|
|
unsigned attachment_count = attachments[3];
|
|
|
|
|
for (unsigned i = 0; i < attachment_count; ++i) {
|
|
|
|
|
uint32_t *ptr = attachments + 4 + (i * AGX_IOGPU_ATTACHMENT_LENGTH / 4);
|
|
|
|
|
DUMP_CL(IOGPU_ATTACHMENT, ptr, "Attachment");
|
|
|
|
|
}
|
|
|
|
|
|
2022-09-12 22:34:12 -04:00
|
|
|
if (cmd.unk_5 == 3)
|
2022-09-14 20:08:23 -04:00
|
|
|
agxdecode_cs((uint32_t *) cmdbuf->ptr.cpu, cmd.encoder, verbose);
|
2022-09-12 22:34:12 -04:00
|
|
|
else
|
2022-09-14 20:08:23 -04:00
|
|
|
agxdecode_gfx((uint32_t *) cmdbuf->ptr.cpu, cmd.encoder, verbose);
|
2022-04-02 13:22:04 -04:00
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
agxdecode_map_read_write();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
2021-07-10 11:04:45 -04:00
|
|
|
agxdecode_dump_mappings(unsigned map_handle)
|
2021-04-24 19:13:29 -04:00
|
|
|
{
|
|
|
|
|
agxdecode_dump_file_open();
|
|
|
|
|
|
2021-07-10 11:04:45 -04:00
|
|
|
struct agx_bo *map = agxdecode_find_handle(map_handle, AGX_ALLOC_MEMMAP);
|
|
|
|
|
assert(map != NULL && "nonexistant mapping");
|
2022-04-02 22:14:11 -04:00
|
|
|
agxdecode_decode_segment_list(map->ptr.cpu);
|
2021-07-10 11:04:45 -04:00
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
for (unsigned i = 0; i < mmap_count; ++i) {
|
2021-07-10 11:04:45 -04:00
|
|
|
if (!mmap_array[i].ptr.cpu || !mmap_array[i].size || !mmap_array[i].mapped)
|
2021-04-24 19:13:29 -04:00
|
|
|
continue;
|
|
|
|
|
|
|
|
|
|
assert(mmap_array[i].type < AGX_NUM_ALLOC);
|
|
|
|
|
|
|
|
|
|
fprintf(agxdecode_dump_stream, "Buffer: type %s, gpu %" PRIx64 ", handle %u.bin:\n\n",
|
|
|
|
|
agx_alloc_types[mmap_array[i].type],
|
|
|
|
|
mmap_array[i].ptr.gpu, mmap_array[i].handle);
|
|
|
|
|
|
|
|
|
|
hexdump(agxdecode_dump_stream, mmap_array[i].ptr.cpu, mmap_array[i].size, false);
|
|
|
|
|
fprintf(agxdecode_dump_stream, "\n");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
agxdecode_track_alloc(struct agx_bo *alloc)
|
|
|
|
|
{
|
|
|
|
|
assert((mmap_count + 1) < MAX_MAPPINGS);
|
2021-07-10 11:16:56 -04:00
|
|
|
|
|
|
|
|
for (unsigned i = 0; i < mmap_count; ++i) {
|
|
|
|
|
struct agx_bo *bo = &mmap_array[i];
|
|
|
|
|
bool match = (bo->handle == alloc->handle && bo->type == alloc->type);
|
|
|
|
|
assert(!match && "tried to alloc already allocated BO");
|
|
|
|
|
}
|
|
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
mmap_array[mmap_count++] = *alloc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
agxdecode_track_free(struct agx_bo *bo)
|
|
|
|
|
{
|
2021-07-10 11:16:56 -04:00
|
|
|
bool found = false;
|
|
|
|
|
|
2021-04-24 19:13:29 -04:00
|
|
|
for (unsigned i = 0; i < mmap_count; ++i) {
|
|
|
|
|
if (mmap_array[i].handle == bo->handle && mmap_array[i].type == bo->type) {
|
2021-07-10 11:16:56 -04:00
|
|
|
assert(!found && "mapped multiple times!");
|
|
|
|
|
found = true;
|
|
|
|
|
|
|
|
|
|
memset(&mmap_array[i], 0, sizeof(mmap_array[i]));
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
}
|
2021-07-10 11:16:56 -04:00
|
|
|
|
|
|
|
|
assert(found && "freed unmapped memory");
|
2021-04-24 19:13:29 -04:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static int agxdecode_dump_frame_count = 0;
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
agxdecode_dump_file_open(void)
|
|
|
|
|
{
|
|
|
|
|
if (agxdecode_dump_stream)
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
|
|
/* This does a getenv every frame, so it is possible to use
|
|
|
|
|
* setenv to change the base at runtime.
|
|
|
|
|
*/
|
2021-10-31 11:13:58 -04:00
|
|
|
const char *dump_file_base = getenv("AGXDECODE_DUMP_FILE") ?: "agxdecode.dump";
|
2021-04-24 19:13:29 -04:00
|
|
|
if (!strcmp(dump_file_base, "stderr"))
|
|
|
|
|
agxdecode_dump_stream = stderr;
|
|
|
|
|
else {
|
|
|
|
|
char buffer[1024];
|
|
|
|
|
snprintf(buffer, sizeof(buffer), "%s.%04d", dump_file_base, agxdecode_dump_frame_count);
|
|
|
|
|
printf("agxdecode: dump command stream to file %s\n", buffer);
|
|
|
|
|
agxdecode_dump_stream = fopen(buffer, "w");
|
|
|
|
|
if (!agxdecode_dump_stream)
|
|
|
|
|
fprintf(stderr,
|
|
|
|
|
"agxdecode: failed to open command stream log file %s\n",
|
|
|
|
|
buffer);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
|
agxdecode_dump_file_close(void)
|
|
|
|
|
{
|
|
|
|
|
if (agxdecode_dump_stream && agxdecode_dump_stream != stderr) {
|
|
|
|
|
fclose(agxdecode_dump_stream);
|
|
|
|
|
agxdecode_dump_stream = NULL;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
agxdecode_next_frame(void)
|
|
|
|
|
{
|
|
|
|
|
agxdecode_dump_file_close();
|
|
|
|
|
agxdecode_dump_frame_count++;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
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agxdecode_close(void)
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{
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agxdecode_dump_file_close();
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}
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