2023-05-24 16:14:10 -05:00
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/*
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* Copyright © 2022 Collabora, Ltd.
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* SPDX-License-Identifier: MIT
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*/
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2023-12-06 08:40:57 -06:00
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use crate::ir::*;
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2023-05-24 16:14:10 -05:00
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pub trait Builder {
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2023-09-29 11:39:52 -05:00
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fn push_instr(&mut self, instr: Box<Instr>) -> &mut Instr;
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2023-10-25 18:37:16 -07:00
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fn sm(&self) -> u8;
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2023-09-29 11:39:52 -05:00
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fn push_op(&mut self, op: impl Into<Op>) -> &mut Instr {
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self.push_instr(Instr::new_boxed(op))
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}
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fn predicate<'a>(&'a mut self, pred: Pred) -> PredicatedBuilder<'a, Self>
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where
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Self: Sized,
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{
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PredicatedBuilder {
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b: self,
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pred: pred,
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}
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}
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2023-05-25 17:41:16 -05:00
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2023-11-09 10:51:46 -06:00
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fn lop2_to(&mut self, dst: Dst, op: LogicOp2, mut x: Src, mut y: Src) {
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let is_predicate = match dst {
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Dst::None => panic!("No LOP destination"),
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Dst::SSA(ssa) => ssa.is_predicate(),
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Dst::Reg(reg) => reg.is_predicate(),
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};
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assert!(x.is_predicate() == is_predicate);
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assert!(y.is_predicate() == is_predicate);
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2023-11-09 10:51:46 -06:00
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if self.sm() >= 70 {
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let mut op = op.to_lut();
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if x.src_mod.is_bnot() {
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op = LogicOp3::new_lut(&|x, y, _| op.eval(!x, y, 0));
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x.src_mod = SrcMod::None;
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}
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if y.src_mod.is_bnot() {
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op = LogicOp3::new_lut(&|x, y, _| op.eval(x, !y, 0));
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y.src_mod = SrcMod::None;
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}
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if is_predicate {
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self.push_op(OpPLop3 {
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dsts: [dst.into(), Dst::None],
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srcs: [x, y, true.into()],
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ops: [op, LogicOp3::new_const(false)],
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});
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} else {
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self.push_op(OpLop3 {
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dst: dst.into(),
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srcs: [x, y, 0.into()],
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op: op,
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});
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}
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} else {
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if is_predicate {
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let mut x = x;
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let cmp_op = match op {
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LogicOp2::And => PredSetOp::And,
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LogicOp2::Or => PredSetOp::Or,
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LogicOp2::Xor => PredSetOp::Xor,
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LogicOp2::PassB => {
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// Pass through B by AND with PT
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x = true.into();
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PredSetOp::And
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}
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};
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self.push_op(OpPSetP {
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dsts: [dst.into(), Dst::None],
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ops: [cmp_op, PredSetOp::And],
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srcs: [x, y, true.into()],
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});
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} else {
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self.push_op(OpLop2 {
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dst: dst.into(),
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srcs: [x, y],
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op: op,
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});
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}
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}
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}
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2023-12-01 13:28:55 -06:00
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fn prmt_to(&mut self, dst: Dst, x: Src, y: Src, sel: [u8; 4]) {
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2023-11-23 21:42:57 -06:00
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if sel == [0, 1, 2, 3] {
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self.copy_to(dst, x);
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} else if sel == [4, 5, 6, 7] {
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self.copy_to(dst, y);
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} else {
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let mut sel_u32 = 0;
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for i in 0..4 {
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assert!(sel[i] < 16);
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sel_u32 |= u32::from(sel[i]) << (i * 4);
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}
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self.push_op(OpPrmt {
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dst: dst,
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srcs: [x, y],
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sel: sel_u32.into(),
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mode: PrmtMode::Index,
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});
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}
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}
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2023-08-28 13:39:41 -05:00
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fn copy_to(&mut self, dst: Dst, src: Src) {
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self.push_op(OpCopy { dst: dst, src: src });
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}
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fn swap(&mut self, x: RegRef, y: RegRef) {
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assert!(x.file() == y.file());
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self.push_op(OpSwap {
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dsts: [x.into(), y.into()],
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srcs: [y.into(), x.into()],
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});
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}
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2023-05-24 16:14:10 -05:00
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}
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pub trait SSABuilder: Builder {
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fn alloc_ssa(&mut self, file: RegFile, comps: u8) -> SSARef;
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2023-11-15 13:25:17 -08:00
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fn shl(&mut self, x: Src, shift: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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if self.sm() >= 70 {
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self.push_op(OpShf {
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dst: dst.into(),
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low: x,
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high: 0.into(),
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shift: shift,
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right: false,
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wrap: true,
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data_type: IntType::I32,
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dst_high: false,
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});
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} else {
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self.push_op(OpShl {
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dst: dst.into(),
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src: x,
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shift: shift,
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wrap: true,
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});
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}
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dst
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}
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fn shr(&mut self, x: Src, shift: Src, signed: bool) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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if self.sm() >= 70 {
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self.push_op(OpShf {
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dst: dst.into(),
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low: 0.into(),
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high: x,
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shift: shift,
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right: true,
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wrap: true,
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data_type: if signed { IntType::I32 } else { IntType::U32 },
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dst_high: true,
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});
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} else {
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self.push_op(OpShr {
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dst: dst.into(),
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src: x,
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shift: shift,
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wrap: true,
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signed,
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});
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}
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dst
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}
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2023-05-24 16:14:10 -05:00
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fn fadd(&mut self, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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self.push_op(OpFAdd {
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dst: dst.into(),
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srcs: [x, y],
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saturate: false,
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rnd_mode: FRndMode::NearestEven,
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ftz: false,
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});
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dst
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}
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fn fmul(&mut self, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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self.push_op(OpFMul {
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dst: dst.into(),
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srcs: [x, y],
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saturate: false,
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rnd_mode: FRndMode::NearestEven,
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ftz: false,
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dnz: false,
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});
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dst
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}
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fn fset(&mut self, cmp_op: FloatCmpOp, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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self.push_op(OpFSet {
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dst: dst.into(),
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cmp_op: cmp_op,
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srcs: [x, y],
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2023-12-07 10:59:53 -06:00
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ftz: false,
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});
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dst
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}
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fn fsetp(&mut self, cmp_op: FloatCmpOp, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::Pred, 1);
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self.push_op(OpFSetP {
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dst: dst.into(),
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set_op: PredSetOp::And,
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cmp_op: cmp_op,
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srcs: [x, y],
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accum: SrcRef::True.into(),
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ftz: false,
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});
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dst
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}
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fn iabs(&mut self, i: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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self.push_op(OpIAbs {
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dst: dst.into(),
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src: i,
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});
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dst
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}
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fn iadd(&mut self, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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2023-10-24 16:24:04 -07:00
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if self.sm() >= 70 {
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self.push_op(OpIAdd3 {
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dst: dst.into(),
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srcs: [Src::new_zero(), x, y],
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overflow: [Dst::None; 2],
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});
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} else {
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self.push_op(OpIAdd2 {
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dst: dst.into(),
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srcs: [x, y],
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2023-11-11 15:58:02 -08:00
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carry_in: 0.into(),
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carry_out: Dst::None,
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});
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}
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2023-05-24 16:14:10 -05:00
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dst
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}
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2023-11-11 15:11:54 -08:00
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fn iadd64(&mut self, x: Src, y: Src) -> SSARef {
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let x = x.as_ssa().unwrap();
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let y = y.as_ssa().unwrap();
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let dst = self.alloc_ssa(RegFile::GPR, 2);
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if self.sm() >= 70 {
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let carry = self.alloc_ssa(RegFile::Pred, 1);
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self.push_op(OpIAdd3 {
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dst: dst[0].into(),
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overflow: [carry.into(), Dst::None],
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srcs: [x[0].into(), y[0].into(), 0.into()],
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});
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self.push_op(OpIAdd3X {
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dst: dst[1].into(),
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overflow: [Dst::None, Dst::None],
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srcs: [x[1].into(), y[1].into(), 0.into()],
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carry: [carry.into(), false.into()],
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});
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} else {
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2023-11-11 15:58:02 -08:00
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let carry = self.alloc_ssa(RegFile::Carry, 1);
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self.push_op(OpIAdd2 {
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dst: dst[0].into(),
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srcs: [x[0].into(), y[0].into()],
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2023-11-11 15:58:02 -08:00
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carry_out: carry.into(),
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carry_in: 0.into(),
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});
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self.push_op(OpIAdd2 {
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dst: dst[1].into(),
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srcs: [x[1].into(), y[1].into()],
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2023-11-11 15:58:02 -08:00
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carry_out: Dst::None,
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carry_in: carry.into(),
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2023-11-11 15:11:54 -08:00
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});
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}
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dst
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}
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2023-11-17 11:28:26 -06:00
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fn imnmx(&mut self, tp: IntCmpType, x: Src, y: Src, min: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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self.push_op(OpIMnMx {
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dst: dst.into(),
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cmp_type: tp,
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srcs: [x, y],
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min: min,
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});
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dst
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}
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fn imul(&mut self, x: Src, y: Src) -> SSARef {
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let dst = self.alloc_ssa(RegFile::GPR, 1);
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2023-12-10 18:16:46 +01:00
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if self.sm() >= 70 {
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2023-10-24 19:10:23 -07:00
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self.push_op(OpIMad {
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dst: dst.into(),
|
|
|
|
|
srcs: [x, y, 0.into()],
|
|
|
|
|
signed: false,
|
|
|
|
|
});
|
|
|
|
|
} else {
|
|
|
|
|
self.push_op(OpIMul {
|
|
|
|
|
dst: dst[0].into(),
|
|
|
|
|
srcs: [x, y],
|
|
|
|
|
signed: [false; 2],
|
|
|
|
|
high: false,
|
|
|
|
|
});
|
|
|
|
|
}
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fn imul_2x32_64(&mut self, x: Src, y: Src, signed: bool) -> SSARef {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 2);
|
2023-12-10 18:16:46 +01:00
|
|
|
if self.sm() >= 70 {
|
2023-10-24 19:10:23 -07:00
|
|
|
self.push_op(OpIMad64 {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
srcs: [x, y, 0.into()],
|
|
|
|
|
signed,
|
|
|
|
|
});
|
|
|
|
|
} else {
|
|
|
|
|
self.push_op(OpIMul {
|
|
|
|
|
dst: dst[0].into(),
|
|
|
|
|
srcs: [x, y],
|
|
|
|
|
signed: [signed; 2],
|
|
|
|
|
high: false,
|
|
|
|
|
});
|
|
|
|
|
self.push_op(OpIMul {
|
|
|
|
|
dst: dst[1].into(),
|
|
|
|
|
srcs: [x, y],
|
|
|
|
|
signed: [signed; 2],
|
|
|
|
|
high: true,
|
|
|
|
|
});
|
|
|
|
|
}
|
2023-11-17 11:28:26 -06:00
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
2023-05-24 16:14:10 -05:00
|
|
|
fn ineg(&mut self, i: Src) -> SSARef {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 1);
|
|
|
|
|
self.push_op(OpINeg {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
src: i,
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fn isetp(
|
|
|
|
|
&mut self,
|
|
|
|
|
cmp_type: IntCmpType,
|
|
|
|
|
cmp_op: IntCmpOp,
|
|
|
|
|
x: Src,
|
|
|
|
|
y: Src,
|
|
|
|
|
) -> SSARef {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::Pred, 1);
|
|
|
|
|
self.push_op(OpISetP {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
set_op: PredSetOp::And,
|
|
|
|
|
cmp_op: cmp_op,
|
|
|
|
|
cmp_type: cmp_type,
|
2023-12-04 13:03:35 -06:00
|
|
|
ex: false,
|
2023-05-24 16:14:10 -05:00
|
|
|
srcs: [x, y],
|
2023-12-04 13:03:35 -06:00
|
|
|
accum: true.into(),
|
|
|
|
|
low_cmp: true.into(),
|
2023-05-24 16:14:10 -05:00
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
2023-12-04 13:03:35 -06:00
|
|
|
fn isetp64(
|
|
|
|
|
&mut self,
|
|
|
|
|
cmp_type: IntCmpType,
|
|
|
|
|
cmp_op: IntCmpOp,
|
|
|
|
|
x: Src,
|
|
|
|
|
y: Src,
|
|
|
|
|
) -> SSARef {
|
|
|
|
|
let x = x.as_ssa().unwrap();
|
|
|
|
|
let y = y.as_ssa().unwrap();
|
|
|
|
|
|
|
|
|
|
// Low bits are always an unsigned comparison
|
|
|
|
|
let low = self.isetp(IntCmpType::U32, cmp_op, x[0].into(), y[0].into());
|
|
|
|
|
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::Pred, 1);
|
|
|
|
|
match cmp_op {
|
|
|
|
|
IntCmpOp::Eq | IntCmpOp::Ne => {
|
|
|
|
|
self.push_op(OpISetP {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
set_op: match cmp_op {
|
|
|
|
|
IntCmpOp::Eq => PredSetOp::And,
|
|
|
|
|
IntCmpOp::Ne => PredSetOp::Or,
|
|
|
|
|
_ => panic!("Not an integer equality"),
|
|
|
|
|
},
|
|
|
|
|
cmp_op: cmp_op,
|
|
|
|
|
cmp_type: IntCmpType::U32,
|
|
|
|
|
ex: false,
|
|
|
|
|
srcs: [x[1].into(), y[1].into()],
|
|
|
|
|
accum: low.into(),
|
|
|
|
|
low_cmp: true.into(),
|
|
|
|
|
});
|
|
|
|
|
}
|
|
|
|
|
IntCmpOp::Ge | IntCmpOp::Gt | IntCmpOp::Le | IntCmpOp::Lt => {
|
|
|
|
|
self.push_op(OpISetP {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
set_op: PredSetOp::And,
|
|
|
|
|
cmp_op: cmp_op,
|
|
|
|
|
cmp_type: cmp_type,
|
|
|
|
|
ex: true,
|
|
|
|
|
srcs: [x[1].into(), y[1].into()],
|
|
|
|
|
accum: true.into(),
|
|
|
|
|
low_cmp: low.into(),
|
|
|
|
|
});
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
2023-11-09 10:51:46 -06:00
|
|
|
fn lop2(&mut self, op: LogicOp2, x: Src, y: Src) -> SSARef {
|
2023-05-25 17:41:16 -05:00
|
|
|
let dst = if x.is_predicate() {
|
|
|
|
|
self.alloc_ssa(RegFile::Pred, 1)
|
2023-05-24 16:14:10 -05:00
|
|
|
} else {
|
2023-05-25 17:41:16 -05:00
|
|
|
self.alloc_ssa(RegFile::GPR, 1)
|
|
|
|
|
};
|
|
|
|
|
self.lop2_to(dst.into(), op, x, y);
|
|
|
|
|
dst
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fn mufu(&mut self, op: MuFuOp, src: Src) -> SSARef {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 1);
|
|
|
|
|
self.push_op(OpMuFu {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
op: op,
|
|
|
|
|
src: src,
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
2023-12-01 13:28:55 -06:00
|
|
|
fn prmt(&mut self, x: Src, y: Src, sel: [u8; 4]) -> SSARef {
|
2023-11-23 21:42:57 -06:00
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 1);
|
|
|
|
|
self.prmt_to(dst.into(), x, y, sel);
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
2023-12-01 13:28:55 -06:00
|
|
|
fn prmt4(&mut self, src: [Src; 4], sel: [u8; 4]) -> SSARef {
|
2023-11-22 14:32:21 -06:00
|
|
|
let max_sel = *sel.iter().max().unwrap();
|
|
|
|
|
if max_sel < 8 {
|
|
|
|
|
self.prmt(src[0], src[1], sel)
|
|
|
|
|
} else if max_sel < 12 {
|
|
|
|
|
let mut sel_a = [0_u8; 4];
|
|
|
|
|
let mut sel_b = [0_u8; 4];
|
|
|
|
|
for i in 0..4_u8 {
|
|
|
|
|
if sel[usize::from(i)] < 8 {
|
|
|
|
|
sel_a[usize::from(i)] = sel[usize::from(i)];
|
|
|
|
|
sel_b[usize::from(i)] = i;
|
|
|
|
|
} else {
|
|
|
|
|
sel_b[usize::from(i)] = (sel[usize::from(i)] - 8) + 4;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
let a = self.prmt(src[0], src[1], sel_a);
|
|
|
|
|
self.prmt(a.into(), src[2], sel_b)
|
|
|
|
|
} else if max_sel < 16 {
|
|
|
|
|
let mut sel_a = [0_u8; 4];
|
|
|
|
|
let mut sel_b = [0_u8; 4];
|
|
|
|
|
let mut sel_c = [0_u8; 4];
|
|
|
|
|
for i in 0..4_u8 {
|
|
|
|
|
if sel[usize::from(i)] < 8 {
|
|
|
|
|
sel_a[usize::from(i)] = sel[usize::from(i)];
|
|
|
|
|
sel_c[usize::from(i)] = i;
|
|
|
|
|
} else {
|
|
|
|
|
sel_b[usize::from(i)] = sel[usize::from(i)] - 8;
|
|
|
|
|
sel_c[usize::from(i)] = 4 + i;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
let a = self.prmt(src[0], src[1], sel_a);
|
|
|
|
|
let b = self.prmt(src[2], src[3], sel_b);
|
|
|
|
|
self.prmt(a.into(), b.into(), sel_c)
|
|
|
|
|
} else {
|
|
|
|
|
panic!("Invalid permute value: {max_sel}");
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2023-05-24 16:14:10 -05:00
|
|
|
fn sel(&mut self, cond: Src, x: Src, y: Src) -> SSARef {
|
|
|
|
|
assert!(cond.src_ref.is_predicate());
|
|
|
|
|
assert!(x.is_predicate() == y.is_predicate());
|
|
|
|
|
if x.is_predicate() {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::Pred, 1);
|
|
|
|
|
self.push_op(OpPLop3 {
|
|
|
|
|
dsts: [dst.into(), Dst::None],
|
|
|
|
|
srcs: [cond, x, y],
|
|
|
|
|
ops: [
|
2023-11-09 10:48:33 -06:00
|
|
|
LogicOp3::new_lut(&|c, x, y| (c & x) | (!c & y)),
|
|
|
|
|
LogicOp3::new_const(false),
|
2023-05-24 16:14:10 -05:00
|
|
|
],
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
} else {
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 1);
|
|
|
|
|
self.push_op(OpSel {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
cond: cond,
|
|
|
|
|
srcs: [x, y],
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
}
|
2023-08-28 19:53:38 -05:00
|
|
|
|
|
|
|
|
fn copy(&mut self, src: Src) -> SSARef {
|
|
|
|
|
let dst = if src.is_predicate() {
|
|
|
|
|
self.alloc_ssa(RegFile::Pred, 1)
|
|
|
|
|
} else {
|
|
|
|
|
self.alloc_ssa(RegFile::GPR, 1)
|
|
|
|
|
};
|
|
|
|
|
self.copy_to(dst.into(), src);
|
|
|
|
|
dst
|
|
|
|
|
}
|
2023-12-04 09:14:56 -06:00
|
|
|
|
|
|
|
|
fn bmov_to_bar(&mut self, src: Src) -> SSARef {
|
|
|
|
|
assert!(src.src_ref.as_ssa().unwrap().file() == RegFile::GPR);
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::Bar, 1);
|
|
|
|
|
self.push_op(OpBMov {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
src: src,
|
|
|
|
|
clear: false,
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
fn bmov_to_gpr(&mut self, src: Src) -> SSARef {
|
|
|
|
|
assert!(src.src_ref.as_ssa().unwrap().file() == RegFile::Bar);
|
|
|
|
|
let dst = self.alloc_ssa(RegFile::GPR, 1);
|
|
|
|
|
self.push_op(OpBMov {
|
|
|
|
|
dst: dst.into(),
|
|
|
|
|
src: src,
|
|
|
|
|
clear: false,
|
|
|
|
|
});
|
|
|
|
|
dst
|
|
|
|
|
}
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pub struct InstrBuilder {
|
|
|
|
|
instrs: MappedInstrs,
|
2023-10-25 18:37:16 -07:00
|
|
|
sm: u8,
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
impl InstrBuilder {
|
2023-10-25 18:37:16 -07:00
|
|
|
pub fn new(sm: u8) -> Self {
|
2023-05-24 16:14:10 -05:00
|
|
|
Self {
|
|
|
|
|
instrs: MappedInstrs::None,
|
2023-10-25 18:37:16 -07:00
|
|
|
sm,
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pub fn as_vec(self) -> Vec<Box<Instr>> {
|
|
|
|
|
match self.instrs {
|
|
|
|
|
MappedInstrs::None => Vec::new(),
|
|
|
|
|
MappedInstrs::One(i) => vec![i],
|
|
|
|
|
MappedInstrs::Many(v) => v,
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pub fn as_mapped_instrs(self) -> MappedInstrs {
|
|
|
|
|
self.instrs
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
impl Builder for InstrBuilder {
|
2023-09-29 11:39:52 -05:00
|
|
|
fn push_instr(&mut self, instr: Box<Instr>) -> &mut Instr {
|
2023-05-24 16:14:10 -05:00
|
|
|
self.instrs.push(instr);
|
2023-09-29 11:39:52 -05:00
|
|
|
self.instrs.last_mut().unwrap().as_mut()
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
2023-10-25 18:37:16 -07:00
|
|
|
|
|
|
|
|
fn sm(&self) -> u8 {
|
|
|
|
|
self.sm
|
|
|
|
|
}
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pub struct SSAInstrBuilder<'a> {
|
|
|
|
|
b: InstrBuilder,
|
|
|
|
|
alloc: &'a mut SSAValueAllocator,
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
impl<'a> SSAInstrBuilder<'a> {
|
2023-10-25 18:37:16 -07:00
|
|
|
pub fn new(sm: u8, alloc: &'a mut SSAValueAllocator) -> Self {
|
2023-05-24 16:14:10 -05:00
|
|
|
Self {
|
2023-10-25 18:37:16 -07:00
|
|
|
b: InstrBuilder::new(sm),
|
2023-05-24 16:14:10 -05:00
|
|
|
alloc: alloc,
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
pub fn as_vec(self) -> Vec<Box<Instr>> {
|
|
|
|
|
self.b.as_vec()
|
|
|
|
|
}
|
|
|
|
|
|
2023-12-01 18:42:24 -06:00
|
|
|
#[allow(dead_code)]
|
2023-05-24 16:14:10 -05:00
|
|
|
pub fn as_mapped_instrs(self) -> MappedInstrs {
|
|
|
|
|
self.b.as_mapped_instrs()
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
impl<'a> Builder for SSAInstrBuilder<'a> {
|
2023-09-29 11:39:52 -05:00
|
|
|
fn push_instr(&mut self, instr: Box<Instr>) -> &mut Instr {
|
|
|
|
|
self.b.push_instr(instr)
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
2023-10-25 18:37:16 -07:00
|
|
|
|
|
|
|
|
fn sm(&self) -> u8 {
|
|
|
|
|
self.b.sm()
|
|
|
|
|
}
|
2023-05-24 16:14:10 -05:00
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}
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impl<'a> SSABuilder for SSAInstrBuilder<'a> {
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|
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fn alloc_ssa(&mut self, file: RegFile, comps: u8) -> SSARef {
|
2023-09-06 15:43:37 -05:00
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|
self.alloc.alloc_vec(file, comps)
|
2023-05-24 16:14:10 -05:00
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}
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|
|
|
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}
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|
|
pub struct PredicatedBuilder<'a, T: Builder> {
|
|
|
|
|
b: &'a mut T,
|
|
|
|
|
pred: Pred,
|
|
|
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|
}
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|
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|
impl<'a, T: Builder> Builder for PredicatedBuilder<'a, T> {
|
2023-09-29 11:39:52 -05:00
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|
|
fn push_instr(&mut self, instr: Box<Instr>) -> &mut Instr {
|
2023-05-24 16:14:10 -05:00
|
|
|
let mut instr = instr;
|
|
|
|
|
assert!(instr.pred.is_true());
|
|
|
|
|
instr.pred = self.pred;
|
2023-09-29 11:39:52 -05:00
|
|
|
self.b.push_instr(instr)
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
2023-10-25 18:37:16 -07:00
|
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|
|
|
|
|
|
fn sm(&self) -> u8 {
|
|
|
|
|
self.b.sm()
|
|
|
|
|
}
|
2023-05-24 16:14:10 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
impl<'a, T: SSABuilder> SSABuilder for PredicatedBuilder<'a, T> {
|
|
|
|
|
fn alloc_ssa(&mut self, file: RegFile, comps: u8) -> SSARef {
|
|
|
|
|
self.b.alloc_ssa(file, comps)
|
|
|
|
|
}
|
|
|
|
|
}
|