fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-03 12:08:06 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

nak: Add builder helpers for a few ops

Browse source 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26264>
This commit is contained in:
Faith Ekstrand 2023-11-17 11:28:26 -06:00 • committed by Marge Bot
parent c874db9381
commit 8c79d616bd
2 changed files with 35 additions and 29 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

31
src/nouveau/compiler/nak_builder.rs
View file

@ -76,6 +76,16 @@ pub trait SSABuilder: Builder {
dst
}
fn fmnmx(&mut self, x: Src, y: Src, min: Src) -> SSARef {
let dst = self.alloc_ssa(RegFile::GPR, 1);
self.push_op(OpFMnMx {
dst: dst.into(),
srcs: [x, y],
min: min,
});
dst
}
fn fmul(&mut self, x: Src, y: Src) -> SSARef {
let dst = self.alloc_ssa(RegFile::GPR, 1);
self.push_op(OpFMul {
@ -127,6 +137,27 @@ pub trait SSABuilder: Builder {
dst
}
fn imnmx(&mut self, tp: IntCmpType, x: Src, y: Src, min: Src) -> SSARef {
let dst = self.alloc_ssa(RegFile::GPR, 1);
self.push_op(OpIMnMx {
dst: dst.into(),
cmp_type: tp,
srcs: [x, y],
min: min,
});
dst
}
fn imul(&mut self, x: Src, y: Src) -> SSARef {
let dst = self.alloc_ssa(RegFile::GPR, 1);
self.push_op(OpIMad {
dst: dst.into(),
srcs: [x, y, 0.into()],
signed: false,
});
dst
}
fn ineg(&mut self, i: Src) -> SSARef {
let dst = self.alloc_ssa(RegFile::GPR, 1);
self.push_op(OpINeg {

33
src/nouveau/compiler/nak_from_nir.rs
View file

@ -466,23 +466,11 @@ impl<'a> ShaderFromNir<'a> {
}
nir_op_fmax => {
assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1);
b.push_op(OpFMnMx {
dst: dst.into(),
srcs: [srcs[0], srcs[1]],
min: SrcRef::False.into(),
});
dst
b.fmnmx(srcs[0], srcs[1], false.into())
}
nir_op_fmin => {
assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1);
b.push_op(OpFMnMx {
dst: dst.into(),
srcs: [srcs[0], srcs[1]],
min: SrcRef::True.into(),
});
dst
b.fmnmx(srcs[0], srcs[1], true.into())
}
nir_op_fmul => {
assert!(alu.def.bit_size() == 32);
@ -639,24 +627,11 @@ impl<'a> ShaderFromNir<'a> {
_ => panic!("Not an integer min/max"),
};
assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1);
b.push_op(OpIMnMx {
dst: dst.into(),
cmp_type: tp,
srcs: [srcs[0], srcs[1]],
min: min.into(),
});
dst
b.imnmx(tp, srcs[0], srcs[1], min.into())
}
nir_op_imul => {
assert!(alu.def.bit_size() == 32);
let dst = b.alloc_ssa(RegFile::GPR, 1);
b.push_op(OpIMad {
dst: dst.into(),
srcs: [srcs[0], srcs[1], 0.into()],
signed: false,
});
dst
b.imul(srcs[0], srcs[1])
}
nir_op_imul_2x32_64 | nir_op_umul_2x32_64 => {
let dst = b.alloc_ssa(RegFile::GPR, 2);