mesa/src/amd
Emma Anholt f7cbc7b1c5 radv: Allocate BOs as implicit sync even if the WSI is doing implicit sync.
As noted, the flag we allocate with controls whether *anyone* can implicit
sync on the BO through amdgpu interfaces, not just whether our fd does.
This restores radv to the behavior before the regressing commit.

Fixes: 4dcf32c56e ("wsi/drm: Don't request implicit sync if we're doing implicit sync ourselves.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37772>
2025-10-10 19:17:04 +00:00
..
addrlib addrlib: __debugbreak only present on Windows and from intrin.h 2025-08-07 07:47:42 +00:00
ci radv: allow VK_FORMAT_S8_UINT with host image copy 2025-10-10 13:46:51 +00:00
common ac/surface: fix host image copies with stencil-only 2025-10-10 13:46:51 +00:00
compiler nir: remove load_smem_amd 2025-10-08 08:54:11 +00:00
drm-shim amd/drm-shim: add navi33 2025-08-19 12:15:01 +00:00
gmlib meson: Relax -Wmaybe-uninitialized errors 2025-09-16 06:16:20 +00:00
lanczoslib meson: Relax -Wmaybe-uninitialized errors 2025-09-16 06:16:20 +00:00
llvm nir: remove load_smem_amd 2025-10-08 08:54:11 +00:00
registers amd: Rename GFX1103_R1/R2 to PHOENIX/2 2024-11-20 02:14:40 +00:00
vpelib amd/vpelib: add FL capabilitie and lut container size 2025-09-22 10:37:22 +00:00
vulkan radv: Allocate BOs as implicit sync even if the WSI is doing implicit sync. 2025-10-10 19:17:04 +00:00
meson.build radeonsi/vpe: enhance scaling quality 2025-06-12 07:44:26 +00:00