Timur Kristóf f55771a17d radv: Bypass L2 for gang semaphore BO with SDMA/ACE ... When the "gang leader" is SDMA, we need to ensure that the gang semaphores BO is coherent between SDMA and CP. To achieve this, we need bypass the L2 cache when either SDMA or CP are connected to L2. Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39057>		2025-12-23 12:14:58 +00:00
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addrlib	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
ci	ci: Uprev GL & GLES CTS	2025-12-10 11:31:33 +00:00
common	ac/nir/lower_taskmesh_io_to_mem: Use AC_TASK_DRAW_ENTRY_BYTES	2025-12-22 15:17:59 +00:00
compiler	aco: remove radeon_family from aco::Program	2025-12-22 07:34:48 +00:00
drm-shim	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	amd: add and use ac_cu_info::has_vtx_format_alpha_adjust_bug	2025-12-22 07:34:48 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: add FL capabilitie and lut container size	2025-09-22 10:37:22 +00:00
vulkan	radv: Bypass L2 for gang semaphore BO with SDMA/ACE	2025-12-23 12:14:58 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00