mesa/src/intel
Lionel Landwerlin fa523aedd0
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brw: fence SLM writes between workgroups
On LSC platforms the SLM writes are unfenced between workgroups. This
means a workgroup W1 finishing might have uncompleted SLM writes.
Another workgroup W2 dispatched after W1 which gets allocated an
overlapping SLM location might have writes that race with the previous
W1 operations.

The solution to this is fence all write operations (store & atomics)
of a workgroup before ending the threads. We do this by emitting a
single SLM fence either at the end of the shader or if there is only a
single unfenced right, at the end of that block.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13924
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40430>
2026-03-26 22:38:55 +00:00
..
blorp Rename more sha and sha1 names to blake3 2026-03-23 07:03:28 +00:00
ci Uprev ANGLE to 599125448d7ad53b2868a7b5d2e3e8d3bfbc1717 2026-03-18 00:19:19 +00:00
common Rename more sha and sha1 names to blake3 2026-03-23 07:03:28 +00:00
compiler brw: fence SLM writes between workgroups 2026-03-26 22:38:55 +00:00
decoder intel/decoder: update warning message when buildtype=release 2026-03-09 20:01:01 +00:00
dev intel/dev: add state cache perf fix support xe detection 2026-03-24 18:17:42 +00:00
ds intel: Include available counter descriptions in the perfetto counter spec 2026-03-06 08:47:16 +00:00
executor meson: make dep_lua a disabler 2025-11-21 21:48:57 +00:00
genxml intel/genxml: Add new State Cache Perf Fix Disabled field 2026-03-24 18:17:42 +00:00
isl isl: Apply VALIGN_8 fast-clear restriction on Xe3P+ 2026-03-20 21:25:39 +00:00
mda intel/mda: Use -W for color words diff and -U for regular unified diff 2026-01-28 22:11:11 +00:00
nullhw-layer build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
perf intel/tools: Add xe3p format for intel_monitor 2026-03-26 07:31:09 +00:00
shaders intel/shaders: Build for Xe3P (GFX_VERx10 == 350) 2026-03-04 11:10:34 -08:00
tools intel/tools: Add xe3p format for intel_monitor 2026-03-26 07:31:09 +00:00
vulkan treewide: Enable lowering of primitive ID in a bunch of Vulkan drivers 2026-03-25 03:11:56 +00:00
vulkan_hasvk vulkan/anv:Remove unused anv_clock_gettime 2026-03-25 09:23:33 +00:00
meson.build brw: Move into a new src/intel/compiler/brw subdirectory 2025-10-09 07:01:47 +00:00