Jason Ekstrand e012ec8775 intel/fs: Be more explicit about our placement of [un]zip ... Before, we were careful to place the zip after the last of the split instructions but did unzip on-demand. This changes things so that the unzips go before all of the split instructions and the unzip comes explicitly after all the split instructions. As a side-effect of this change, we now emit the split instruction from highest SIMD group to lowest instead of low to high. We could have kept the old behavior, but it shouldn't matter and this made the code easier. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Cc: mesa-stable@lists.freedesktop.org (cherry picked from commit 0d905597fe)		2017-11-10 16:29:26 +00:00
..
.gitignore
brw_cfg.cpp
brw_cfg.h	intel/compiler: consistently use ifndef guards over pragma once	2017-03-22 16:55:22 +00:00
brw_clip.h	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_clip_line.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_clip_point.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_clip_tri.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_clip_unfilled.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_clip_util.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_compile_clip.c	i965: Move clip program compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_compile_sf.c	i965: Move SF compilation to the compiler	2017-05-26 07:58:01 -07:00
brw_compiler.c	i965: Set lower_vote_trivial in vector_nir_options_gen6 too.	2017-07-21 18:09:01 -07:00
brw_compiler.h	intel/cs: Make thread_local_id a regular builtin param	2017-10-12 22:39:31 -07:00
brw_dead_control_flow.cpp
brw_dead_control_flow.h	intel/compiler: consistently use ifndef guards over pragma once	2017-03-22 16:55:22 +00:00
brw_disasm.c	i965: Add align1 ternary instruction disassembler support	2017-10-20 15:00:17 -07:00
brw_eu.c	i965: Move brw_reg_type_letters() as well	2017-08-21 14:05:23 -07:00
brw_eu.h	i965: Mark src inst pointer const in compaction code	2017-08-21 14:05:23 -07:00
brw_eu_compact.c	i965: Rename brw_inst 3src functions in preparation for align1	2017-10-20 15:00:16 -07:00
brw_eu_defines.h	i965: Add align1 ternary instruction disassembler support	2017-10-20 15:00:17 -07:00
brw_eu_emit.c	intel/eu: Use EXECUTE_1 for JMPI	2017-10-27 21:33:04 +01:00
brw_eu_util.c	intel/compiler: whitespace cleanups	2017-03-13 11:16:35 +00:00
brw_eu_validate.c	i965: Fix memmem compiler warnings.	2017-10-27 21:33:04 +01:00
brw_fs.cpp	intel/fs: Be more explicit about our placement of [un]zip	2017-11-10 16:29:26 +00:00
brw_fs.h	intel: Rewrite the world of push/pull params	2017-10-12 22:39:29 -07:00
brw_fs_builder.h
brw_fs_cmod_propagation.cpp	intel/compiler: Don't propagate cmod into integer multiplies	2017-10-05 11:54:49 -07:00
brw_fs_combine_constants.cpp
brw_fs_copy_propagation.cpp
brw_fs_cse.cpp
brw_fs_dead_code_eliminate.cpp
brw_fs_generator.cpp	intel/fs: Use a pure vertical stride for large register strides	2017-11-10 16:29:26 +00:00
brw_fs_live_variables.cpp
brw_fs_live_variables.h	intel/compiler: consistently use ifndef guards over pragma once	2017-03-22 16:55:22 +00:00
brw_fs_lower_conversions.cpp	i965/fs: rename lower_d2x to lower_conversions	2017-04-14 14:56:07 -07:00
brw_fs_lower_pack.cpp
brw_fs_nir.cpp	i965/fs: remove setting default LOD in the backend	2017-10-20 08:29:53 +02:00
brw_fs_reg_allocate.cpp	intel/fs: Take into account amount of data read in spilling cost heuristic.	2017-04-24 11:01:40 -07:00
brw_fs_register_coalesce.cpp
brw_fs_saturate_propagation.cpp
brw_fs_sel_peephole.cpp	i965/fs: Do not move MOVs writing the flag outside of control flow	2017-07-20 16:56:49 -07:00
brw_fs_surface_builder.cpp	i965: Mark functions static	2017-08-21 14:45:44 -07:00
brw_fs_surface_builder.h
brw_fs_validate.cpp
brw_fs_visitor.cpp	intel/vs: Grow the param array for clip planes	2017-10-12 22:39:30 -07:00
brw_inst.h	i965: Add align1 ternary instruction-word support	2017-10-20 15:00:17 -07:00
brw_interpolation_map.c
brw_ir_allocator.h
brw_ir_fs.h	i965: Move fs_inst::has_side_effects()'s eot check to the parent class.	2017-10-19 10:19:20 -07:00
brw_ir_vec4.h	i965/vec4: don't do horizontal stride on some register file types	2017-04-14 14:56:09 -07:00
brw_nir.c	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_nir.h	intel: Allocate prog_data::[pull_]param deeper inside the compiler	2017-10-12 22:39:31 -07:00
brw_nir_analyze_boolean_resolves.c
brw_nir_analyze_ubo_ranges.c	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_nir_attribute_workarounds.c	nir: Rework conversion opcodes	2017-03-14 07:36:40 -07:00
brw_nir_lower_cs_intrinsics.c	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_nir_opt_peephole_ffma.c
brw_nir_tcs_workarounds.c	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_nir_trig_workarounds.py	intel: use a flag instead of setting PYTHONPATH	2017-09-27 09:07:28 -07:00
brw_packed_float.c
brw_predicated_break.cpp
brw_reg.h	i965: Move brw_reg_type_is_floating_point to brw_reg_type.h	2017-10-20 15:00:16 -07:00
brw_reg_type.c	i965: Add align1 ternary instruction support to conversion functions	2017-10-20 15:00:17 -07:00
brw_reg_type.h	i965: Add align1 ternary instruction support to conversion functions	2017-10-20 15:00:17 -07:00
brw_schedule_instructions.cpp	i965: Use is_scheduling_barrier instead of schedule_node::is_barrier.	2017-10-19 10:19:20 -07:00
brw_shader.cpp	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_shader.h	i965: Move fs_inst::has_side_effects()'s eot check to the parent class.	2017-10-19 10:19:20 -07:00
brw_vec4.cpp	intel: Allocate prog_data::[pull_]param deeper inside the compiler	2017-10-12 22:39:31 -07:00
brw_vec4.h	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_builder.h
brw_vec4_cmod_propagation.cpp	intel/compiler: Don't propagate cmod into integer multiplies	2017-10-05 11:54:49 -07:00
brw_vec4_copy_propagation.cpp	i965: Support copy propagating of untyped atomic surface indexes.	2017-09-26 15:35:14 -07:00
brw_vec4_cse.cpp
brw_vec4_dead_code_eliminate.cpp	i965/vec4/dce: improve track of partial flag register writes	2017-04-14 14:56:09 -07:00
brw_vec4_generator.cpp	nir: Get rid of nir_shader::stage	2017-10-20 12:49:17 -07:00
brw_vec4_gs_nir.cpp	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_gs_visitor.cpp	intel: Rewrite the world of push/pull params	2017-10-12 22:39:29 -07:00
brw_vec4_gs_visitor.h	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_live_variables.cpp
brw_vec4_live_variables.h	i965/vec4: consider subregister offset in live variables	2017-04-14 14:56:08 -07:00
brw_vec4_nir.cpp	i965/vec4: remove setting default LOD in the backend	2017-10-20 08:29:53 +02:00
brw_vec4_reg_allocate.cpp	i965/vec4: Return float from spill_cost_for_type()	2017-08-21 14:45:44 -07:00
brw_vec4_surface_builder.cpp	i965/vec4: Fix swizzles on atomic sources.	2017-09-26 15:35:11 -07:00
brw_vec4_surface_builder.h
brw_vec4_tcs.cpp	i965/cnl: Make URB {VS, GS, HS, DS} sizes non multiple of 3	2017-06-09 16:02:59 -07:00
brw_vec4_tcs.h	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_tes.cpp	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_tes.h	i965/vec4: Delete the system value infastructure	2017-05-09 15:08:07 -07:00
brw_vec4_visitor.cpp	i965/vec4: remove setting default LOD in the backend	2017-10-20 08:29:53 +02:00
brw_vec4_vs.h	intel: Rewrite the world of push/pull params	2017-10-12 22:39:29 -07:00
brw_vec4_vs_visitor.cpp	intel/vs: Grow the param array for clip planes	2017-10-12 22:39:30 -07:00
brw_vue_map.c
brw_wm_iz.cpp	nir: Embed the shader_info in the nir_shader again	2017-05-09 15:07:47 -07:00
gen6_gs_visitor.cpp	i965: Move SOL PSIZ hacks from draw time to link time.	2017-06-01 00:08:29 -07:00
gen6_gs_visitor.h
intel_asm_annotation.c	i965: Add a weak no-op nir_print_instr() symbol	2017-05-15 11:43:01 -07:00
intel_asm_annotation.h
meson.build	intel/compiler: Make brw_nir_lower_intrinsics compute-specific	2017-10-12 22:39:30 -07:00
test_eu_compact.cpp	i965: Remove CONT/BREAK from instruction compaction test	2017-08-21 14:05:23 -07:00
test_eu_validate.cpp	i965: Validate "Special Requirements for Handling Double Precision Data Types"	2017-10-04 14:08:54 -07:00
test_fs_cmod_propagation.cpp
test_fs_copy_propagation.cpp
test_fs_saturate_propagation.cpp
test_vec4_cmod_propagation.cpp
test_vec4_copy_propagation.cpp
test_vec4_register_coalesce.cpp
test_vf_float_conversions.cpp