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efe60d2940
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Michael Cheng <michael.cheng@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
203 lines
5.6 KiB
C
203 lines
5.6 KiB
C
/*
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* Copyright 2003 VMware, Inc.
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* Copyright © 2007 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef INTEL_DEBUG_H
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#define INTEL_DEBUG_H
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#include <stdint.h>
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#include "compiler/shader_enums.h"
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#include "util/bitset.h"
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#include "util/macros.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* \file intel_debug.h
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*
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* Basic INTEL_DEBUG environment variable handling. This file defines the
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* list of debugging flags, as well as some macros for handling them.
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*/
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enum intel_debug_flag {
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DEBUG_TEXTURE = 0,
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DEBUG_BLIT,
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DEBUG_PERF,
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DEBUG_PERFMON,
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DEBUG_BATCH,
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DEBUG_BUFMGR,
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DEBUG_SYNC,
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DEBUG_SF,
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DEBUG_SUBMIT,
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DEBUG_URB,
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DEBUG_CLIP,
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DEBUG_STALL,
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DEBUG_BLORP,
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DEBUG_NO_DUAL_OBJECT_GS,
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DEBUG_OPTIMIZER,
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DEBUG_MDA,
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DEBUG_ANNOTATION,
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DEBUG_NO_OACONFIG,
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DEBUG_NO_FILL_OPT,
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DEBUG_SPILL_FS,
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DEBUG_SPILL_VEC4,
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DEBUG_HEX,
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DEBUG_NO_COMPACTION,
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DEBUG_L3,
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DEBUG_NO_CCS,
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DEBUG_NO_HIZ,
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DEBUG_NO_CCS_MODIFIER,
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DEBUG_COLOR,
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DEBUG_REEMIT,
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DEBUG_SOFT64,
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DEBUG_BT,
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DEBUG_PIPE_CONTROL,
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DEBUG_NO_FAST_CLEAR,
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DEBUG_CAPTURE_ALL,
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DEBUG_PERF_SYMBOL_NAMES,
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DEBUG_SWSB_STALL,
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DEBUG_HEAPS,
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DEBUG_ISL,
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DEBUG_SPARSE,
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DEBUG_DRAW_BKP,
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DEBUG_DISPATCH_BKP,
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DEBUG_BATCH_STATS,
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DEBUG_REG_PRESSURE,
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DEBUG_SHADER_PRINT,
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DEBUG_CL_QUIET,
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DEBUG_BVH_BLAS,
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DEBUG_BVH_TLAS,
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DEBUG_BVH_BLAS_IR_HDR,
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DEBUG_BVH_TLAS_IR_HDR,
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DEBUG_BVH_BLAS_IR_AS,
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DEBUG_BVH_TLAS_IR_AS,
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DEBUG_BVH_NO_BUILD,
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DEBUG_NO_SEND_GATHER,
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DEBUG_NO_VRT,
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DEBUG_RT_NO_TRACE,
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DEBUG_SHADERS_LINENO,
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/* Keep the stages grouped */
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DEBUG_VS,
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DEBUG_TCS,
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DEBUG_TES,
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DEBUG_GS,
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DEBUG_WM,
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DEBUG_TASK,
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DEBUG_MESH,
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DEBUG_CS,
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DEBUG_RT,
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DEBUG_NO8,
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DEBUG_NO16,
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DEBUG_NO32,
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DEBUG_DO32,
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/* Must be the last entry */
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INTEL_DEBUG_MAX,
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};
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extern BITSET_WORD intel_debug[BITSET_WORDS(INTEL_DEBUG_MAX)];
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/* Check if a debug flag is enabled by testing its bit position */
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#define INTEL_DEBUG(flag) unlikely(BITSET_TEST(intel_debug, (flag)))
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/* These flags are not compatible with the disk shader cache */
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#define DEBUG_DISK_CACHE_DISABLE_MASK 0
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/* Flags to determine what bvh to dump out */
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#define INTEL_DEBUG_BVH_ANY (unlikely(INTEL_DEBUG(DEBUG_BVH_BLAS) || \
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INTEL_DEBUG(DEBUG_BVH_TLAS) || \
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INTEL_DEBUG(DEBUG_BVH_BLAS_IR_HDR) || \
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INTEL_DEBUG(DEBUG_BVH_TLAS_IR_HDR) || \
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INTEL_DEBUG(DEBUG_BVH_BLAS_IR_AS) || \
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INTEL_DEBUG(DEBUG_BVH_TLAS_IR_AS)))
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extern uint64_t intel_simd;
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extern uint32_t intel_debug_bkp_before_draw_count;
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extern uint32_t intel_debug_bkp_after_draw_count;
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extern uint32_t intel_debug_bkp_before_dispatch_count;
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extern uint32_t intel_debug_bkp_after_dispatch_count;
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extern uint64_t intel_debug_batch_frame_start;
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extern uint64_t intel_debug_batch_frame_stop;
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extern uint32_t intel_shader_dump_filter;
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#define INTEL_SIMD(type, size) (!!(intel_simd & (DEBUG_ ## type ## _SIMD ## size)))
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/* VS, TCS, TES and GS stages are dispatched in one size */
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#define DEBUG_FS_SIMD8 (1ull << 0)
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#define DEBUG_FS_SIMD16 (1ull << 1)
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#define DEBUG_FS_SIMD32 (1ull << 2)
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#define DEBUG_FS_SIMD2X8 (1ull << 3)
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#define DEBUG_FS_SIMD4X8 (1ull << 4)
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#define DEBUG_FS_SIMD2X16 (1ull << 5)
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#define DEBUG_CS_SIMD8 (1ull << 6)
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#define DEBUG_CS_SIMD16 (1ull << 7)
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#define DEBUG_CS_SIMD32 (1ull << 8)
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#define DEBUG_TS_SIMD8 (1ull << 9)
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#define DEBUG_TS_SIMD16 (1ull << 10)
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#define DEBUG_TS_SIMD32 (1ull << 11)
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#define DEBUG_MS_SIMD8 (1ull << 12)
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#define DEBUG_MS_SIMD16 (1ull << 13)
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#define DEBUG_MS_SIMD32 (1ull << 14)
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#define DEBUG_RT_SIMD8 (1ull << 15)
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#define DEBUG_RT_SIMD16 (1ull << 16)
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#define DEBUG_RT_SIMD32 (1ull << 17)
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#define SIMD_DISK_CACHE_MASK ((1ull << 18) - 1)
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#ifdef HAVE_ANDROID_PLATFORM
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#define LOG_TAG "INTEL-MESA"
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#if ANDROID_API_LEVEL >= 26
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#include <log/log.h>
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#else
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#include <cutils/log.h>
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#endif /* use log/log.h start from android 8 major version */
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#ifndef ALOGW
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#define ALOGW LOGW
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#endif
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#define dbg_printf(...) ALOGW(__VA_ARGS__)
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#else
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#define dbg_printf(...) fprintf(stderr, __VA_ARGS__)
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#endif /* HAVE_ANDROID_PLATFORM */
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#define DBG(...) do { \
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if (INTEL_DEBUG(FILE_DEBUG_FLAG)) \
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dbg_printf(__VA_ARGS__); \
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} while(0)
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extern uint64_t intel_debug_flag_for_shader_stage(mesa_shader_stage stage);
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extern void process_intel_debug_variable(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* INTEL_DEBUG_H */
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