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c3c251d98f
We were using a write dependency to ensure ordering since LDTMUs sequences are ordered, but by using a write dependency with TMU config we were also preserving ordering with TMU config writes that are not a sequence terminator, which is not required and reduces scheduling flexibility. Instead, use a write dependency to ensure strict ordering of TMU reads, but only a read depdency with TMU config. With this change we also need to update CS barriers to also have a write dependency with TMU reads to ensure that we don't move TMU reads around CS barriers. total instructions in shared programs: 13602500 -> 13597851 (-0.03%) instructions in affected programs: 2681428 -> 2676779 (-0.17%) helped: 6567 HURT: 4960 Instructions are helped. total max-temps in shared programs: 2317927 -> 2317914 (<.01%) max-temps in affected programs: 13861 -> 13848 (-0.09%) helped: 355 HURT: 300 Inconclusive result (value mean confidence interval includes 0). total sfu-stalls in shared programs: 32074 -> 32247 (0.54%) sfu-stalls in affected programs: 848 -> 1021 (20.40%) helped: 160 HURT: 327 Inconclusive result (%-change mean confidence interval includes 0). total inst-and-stalls in shared programs: 13634574 -> 13630098 (-0.03%) inst-and-stalls in affected programs: 2703041 -> 2698565 (-0.17%) helped: 6558 HURT: 5020 Inst-and-stalls are helped. Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9856> |
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