mesa/src
Lionel Landwerlin aa53665fda intel/fs/copy_prop: check stride constraints with actual final type
In some cases we will change the type of the destination register of
an instruction. This is the type we should use to verify that we're
allow to do the replacement.

Otherwise we can hit restrictions on CHV and upcoming Xe-Hp for
instance where the copy propagation transforms this :

send(16) (mlen: 2) vgrf10:UD, 0u, 0u, vgrf35:D, null:UD
mov(16) vgrf11:UW, vgrf10<2>:UW
mov(16) vgrf12:UW, vgrf10+0.2<2>:UW
mov(16) vgrf15:HF, |vgrf11|:HF
mov(16) vgrf16:HF, |vgrf12|:HF
mov(8) vgrf41<2>:UW, vgrf15+0.0:UW group0
mov(8) vgrf42<2>:UW, vgrf15+0.16:UW group8
mov(8) vgrf45<2>:UW, vgrf16+0.0:UW group0
mov(8) vgrf46<2>:UW, vgrf16+0.16:UW group8

into this :

send(16) (mlen: 2) vgrf10:UD, 0u, 0u, vgrf35:D, null:UD
mov(8) vgrf41<2>:HF, |vgrf10+0.0|<2>:HF group0
mov(8) vgrf42<2>:HF, |vgrf10+1.0|<2>:HF group8
mov(8) vgrf45<2>:HF, |vgrf10+0.2|<2>:HF group0
mov(8) vgrf46<2>:HF, |vgrf10+1.2|<2>:HF group8

Because of the floating point use, stride and offets should be the
same.

v2: Fix final destination type selection (Curro)

v3: constify (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9832>
2021-03-29 22:14:45 +00:00
..
amd ac/surface: do not allocate FMASK or CMASK for stencil-only surfaces on GFX9+ 2021-03-29 20:18:29 +00:00
android_stub android: add some more stub functions for cross compilation 2021-03-25 06:06:16 +00:00
broadcom broadcom/compiler: flag TMU reads with a read dependency on last TMU config 2021-03-29 06:21:22 +00:00
compiler nir: Update clip_distance_array_size in clip lowering. 2021-03-26 20:51:18 +00:00
drm-shim drm-shim: report support for timeline semaphores 2021-02-09 21:08:52 +00:00
egl Revert "egl: Don't add hardware device if there is no render node v2." 2021-03-26 10:32:31 +00:00
etnaviv etnaviv/drm: only print out fence error on non timeout 2021-03-29 11:54:59 +02:00
freedreno tu: Skip tu_tiling_config_update_tile_layout() if not using gmem 2021-03-29 21:58:24 +00:00
gallium freedreno/a5xx: Use VALIDREG/CONDREG like a6xx do. 2021-03-29 21:24:16 +00:00
gbm egl: fix software flag in _eglAddDevice call on DRM 2021-03-26 10:32:31 +00:00
getopt scons: Remove. 2021-03-20 10:38:55 +00:00
glx glx/drisw: Implement WaitX and WaitGL 2021-03-19 15:43:49 +00:00
gtest
hgl hgl: Major refactor and cleanup 2021-01-09 20:51:35 -06:00
imgui
intel intel/fs/copy_prop: check stride constraints with actual final type 2021-03-29 22:14:45 +00:00
loader scons: Remove. 2021-03-20 10:38:55 +00:00
mapi scons: Remove. 2021-03-20 10:38:55 +00:00
mesa st/glthread: allow for invalid L3 cache id. 2021-03-29 08:31:09 +00:00
microsoft nir: port fp16 casting code from dxil 2021-03-22 12:16:59 +10:00
nouveau nouveau: add drm-shim support 2021-01-11 22:45:01 +00:00
panfrost panfrost: Move the blend shader cache at the device level 2021-03-29 06:53:50 +00:00
util util: rework AMD cpu L3 cache affinity code. 2021-03-29 08:31:09 +00:00
virtio virgl: implement support for PIPE_CAP_STRING_MARKER 2021-03-09 13:57:05 +00:00
vulkan meson: switch vulkan layer to list of choices 2021-03-25 19:10:03 +00:00
meson.build nouveau: add drm-shim support 2021-01-11 22:45:01 +00:00