fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-30 01:20:17 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2
mesa/src/compiler
History
Corentin Noël a8d669b593 nir/split_64bit_vec3_and_vec4: Use the right number of components 
Always make sure to correctly deref and store a 64bits variable
from the right number of components.

This fixes the `spec@arb_enhanced_layouts@matching_fp64_types_`
piglit tests for virgl.

Corrects this validation issue:
```
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@2
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@3
...
	vec1 32 ssa_302 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_303 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_304 = deref_array &(*ssa_302)[ssa_301] (function_temp dvec2) /* &var_7@2[ssa_301] */
	vec1 32 ssa_305 = deref_array &(*ssa_303)[ssa_301] (function_temp dvec2) /* &var_7@3[ssa_301] */
	vec1 64 ssa_306 = mov ssa_110.z
	intrinsic store_deref (ssa_305, ssa_306) (wrmask=x, access=0)
error: instr->num_components == glsl_get_vector_elements(dst->type) (../src/compiler/nir/nir_validate.c:632)

	vec4 64 ssa_111 = vec4 ssa_14, ssa_13, ssa_12, ssa_109
	vec1 32 ssa_307 = load_const (0x00000000 = 0.000000)
	vec1 32 ssa_308 = iadd ssa_307, ssa_61
	vec1 32 ssa_309 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_310 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_311 = deref_array &(*ssa_309)[ssa_308] (function_temp dvec2) /* &var_7@2[ssa_308] */
	vec1 32 ssa_312 = deref_array &(*ssa_310)[ssa_308] (function_temp dvec2) /* &var_7@3[ssa_308] */
	vec1 64 ssa_313 = mov ssa_111.w
	intrinsic store_deref (ssa_312, ssa_313) (wrmask=, access=0)
error: (nir_intrinsic_write_mask(instr) & ~component_mask) == 0 (../src/compiler/nir/nir_validate.c:803)
```

Fixes: 496fd59d71 (add pass to split 64 bit vec3/4 variable access)
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23880>
2023-06-29 10:59:57 +00:00
..
clc nir: Use nir_builder_create 2023-06-27 18:13:02 +00:00
glsl treewide: Use nir_builder_create more 2023-06-27 18:13:02 +00:00
isaspec ir3, isaspec: add raw instruction to assembler/disassembler. 2023-01-26 14:26:11 +00:00
nir nir/split_64bit_vec3_and_vec4: Use the right number of components 2023-06-29 10:59:57 +00:00
spirv treewide: Use nir_builder_create more 2023-06-27 18:13:02 +00:00
builtin_type_macros.h glsl: add texture subpass variants 2022-11-10 10:21:34 +00:00
glsl_types.cpp compiler: set alignment=1 by default for handling empty struct/interface in glsl_types.cpp 2023-06-28 21:16:05 +00:00
glsl_types.h compiler/types: Be consistent when naming array element/size 2023-06-15 03:43:46 +00:00
meson.build compiler: Move spirv into a module of its own 2023-06-20 16:18:08 +00:00
nir_gl_types.h mesa: #include "util/glheader.h" instead GL/gl.h in shared code 2022-11-03 16:07:31 +00:00
nir_types.cpp compiler/types: Be consistent when naming array element/size 2023-06-15 03:43:46 +00:00
nir_types.h compiler/types: Be consistent when naming array element/size 2023-06-15 03:43:46 +00:00
shader_enums.c compiler: Add mesa_scope_name() function 2023-06-19 23:29:26 +00:00
shader_enums.h util: reinstate ENUM_PACKED 2023-06-21 21:51:59 +00:00
shader_info.h spirv: add support for SpvCapabilityFragmentBarycentricKHR 2023-06-02 13:25:43 +00:00