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nir/split_64bit_vec3_and_vec4: Use the right number of components

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Always make sure to correctly deref and store a 64bits variable
from the right number of components.

This fixes the `spec@arb_enhanced_layouts@matching_fp64_types_`
piglit tests for virgl.

Corrects this validation issue:
```
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@2
	decl_var  INTERP_MODE_FLAT dvec2[] var_7@3
...
	vec1 32 ssa_302 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_303 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_304 = deref_array &(*ssa_302)[ssa_301] (function_temp dvec2) /* &var_7@2[ssa_301] */
	vec1 32 ssa_305 = deref_array &(*ssa_303)[ssa_301] (function_temp dvec2) /* &var_7@3[ssa_301] */
	vec1 64 ssa_306 = mov ssa_110.z
	intrinsic store_deref (ssa_305, ssa_306) (wrmask=x, access=0)
error: instr->num_components == glsl_get_vector_elements(dst->type) (../src/compiler/nir/nir_validate.c:632)

	vec4 64 ssa_111 = vec4 ssa_14, ssa_13, ssa_12, ssa_109
	vec1 32 ssa_307 = load_const (0x00000000 = 0.000000)
	vec1 32 ssa_308 = iadd ssa_307, ssa_61
	vec1 32 ssa_309 = deref_var &var_7@2 (function_temp dvec2[])
	vec1 32 ssa_310 = deref_var &var_7@3 (function_temp dvec2[])
	vec1 32 ssa_311 = deref_array &(*ssa_309)[ssa_308] (function_temp dvec2) /* &var_7@2[ssa_308] */
	vec1 32 ssa_312 = deref_array &(*ssa_310)[ssa_308] (function_temp dvec2) /* &var_7@3[ssa_308] */
	vec1 64 ssa_313 = mov ssa_111.w
	intrinsic store_deref (ssa_312, ssa_313) (wrmask=, access=0)
error: (nir_intrinsic_write_mask(instr) & ~component_mask) == 0 (../src/compiler/nir/nir_validate.c:803)
```

Fixes: 496fd59d71 (add pass to split 64 bit vec3/4 variable access)
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23880>
This commit is contained in:
Corentin Noël 2023-06-27 16:28:41 +02:00 • committed by Marge Bot
parent d3003b0a41
commit a8d669b593
1 changed files with 2 additions and 1 deletions
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3
src/compiler/nir/nir_split_64bit_vec3_and_vec4.c
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@ -213,7 +213,8 @@ split_store_deref(nir_builder *b, nir_intrinsic_instr *intr,
int write_mask_zw = nir_intrinsic_write_mask(intr) & 0xc;
if (write_mask_zw) {
nir_ssa_def *src_zw = nir_channels(b, intr->src[1].ssa, write_mask_zw);
nir_ssa_def *src_zw = nir_channels(b, intr->src[1].ssa,
nir_component_mask(intr->src[1].ssa->num_components) & 0xc);
nir_build_store_deref(b, &deref_zw->dest.ssa, src_zw, write_mask_zw >> 2);
}