Georg Lehmann 96793fb0c1 aco/isel: implement 16bit vec2 shifts ... The source bit size mismatch is a bit annoying, but it's still worth it to vectorize these. Foz-DB Navi48: Totals from 85 (0.11% of 80251) affected shaders: Instrs: 119073 -> 118827 (-0.21%); split: -0.21%, +0.00% CodeSize: 669604 -> 667552 (-0.31%); split: -0.31%, +0.00% VGPRs: 4796 -> 4736 (-1.25%) Latency: 1907685 -> 1901983 (-0.30%); split: -0.32%, +0.02% InvThroughput: 642603 -> 640680 (-0.30%); split: -0.33%, +0.03% VClause: 2088 -> 2091 (+0.14%) Copies: 18300 -> 18394 (+0.51%); split: -0.01%, +0.52% Branches: 3452 -> 3440 (-0.35%) VALU: 63378 -> 63144 (-0.37%); split: -0.37%, +0.00% SALU: 23065 -> 23076 (+0.05%); split: -0.00%, +0.05% Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35825>		2025-07-09 07:23:08 +00:00
..
addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	rusticl: Fix work group size validation	2025-07-01 18:55:01 +00:00
common	nir: add nir_vectorize_cb callback parameter to nir_lower_phis_to_scalar()	2025-07-08 15:33:59 +00:00
compiler	aco/isel: implement 16bit vec2 shifts	2025-07-09 07:23:08 +00:00
drm-shim	amd: Add user queue HQD count to hw_ip info	2025-07-08 10:17:51 +00:00
gmlib	amd/gmlib: remove the executable bit	2025-06-12 07:44:27 +00:00
lanczoslib	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00
llvm	ac/nir: remove ngg_scratch LDS ABI, allocate it in the lowering pass	2025-07-02 20:27:41 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: Fix CodeQL issues Pt1	2025-05-16 11:33:08 +08:00
vulkan	radv/rra/gfx10_3: Fix acceleration structure addresses	2025-07-09 07:04:37 +00:00
meson.build	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00