Marek Olšák 492a176cbb util: increase SHA1_DIGEST_LENGTH to 32 (BLAKE3_KEY_LEN) ... The last 12 bytes are always 0 for now. With this, all SHA1 functions can be internally implemented as BLAKE3, so that we can switch everything to BLAKE3 by only changing the implementation of the sha1 utility. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39110>		2026-01-07 08:32:33 +00:00
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addrlib	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
ci	radv/ci: document recent flakes	2026-01-03 16:27:56 +00:00
common	util: increase SHA1_DIGEST_LENGTH to 32 (BLAKE3_KEY_LEN)	2026-01-07 08:32:33 +00:00
compiler	aco/validate: validate constant bus limit after register allocation based on PhysReg	2026-01-05 14:54:00 +00:00
drm-shim	amd: rename most GFX115x definitions for released chips	2025-12-03 13:29:07 +00:00
gmlib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
lanczoslib	meson: Relax -Wmaybe-uninitialized errors	2025-09-16 06:16:20 +00:00
llvm	amd: add and use ac_cu_info::has_vtx_format_alpha_adjust_bug	2025-12-22 07:34:48 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: add FL capabilitie and lut container size	2025-09-22 10:37:22 +00:00
vulkan	ALL: use SHA1_DIGEST_LENGTH etc. instead of hardcoding the numbers	2026-01-07 08:32:33 +00:00
meson.build	radv/tests: require drm-shim and use it instead of RADV_FORCE_FAMILY	2025-11-19 07:11:05 +00:00