Sagar Ghuge 8a990b5a1c intel/genxml: Added dispatch timeout counter extended field ... Since field is split in between multiple fields, we have to manually write the values and refer to Bspec 43851 for exact values. Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40733>		2026-04-24 01:38:20 +00:00
..
blorp	intel/blorp: remove always-true #if	2026-04-14 18:26:09 +00:00
ci	ci/intel: Switch over to the new tool for restricted traces.	2026-04-23 22:54:12 +00:00
common	genxml/mi: add additional bit to FF_MODE and autostrip helper	2026-03-30 11:02:27 +00:00
compiler	brw: Use brw prefix to LSC helpers tied to brw	2026-04-22 18:25:41 +00:00
decoder	intel/decoder: update warning message when buildtype=release	2026-03-09 20:01:01 +00:00
dev	intel/dev: fixup intel_needs_workaround() macro	2026-04-20 21:53:35 +03:00
ds	intel/ds: report when OA metrics are unavailable	2026-04-13 21:31:51 +00:00
executor	meson: make dep_lua a disabler	2025-11-21 21:48:57 +00:00
genxml	intel/genxml: Added dispatch timeout counter extended field	2026-04-24 01:38:20 +00:00
isl	isl: speedup buffer fills by dropping swizzle programming	2026-03-30 12:05:28 +00:00
mda	intel/mda: Use -W for color words diff and -U for regular unified diff	2026-01-28 22:11:11 +00:00
nullhw-layer	build: avoid redefining unreachable() which is standard in C23	2025-07-31 17:49:42 +00:00
perf	intel/ds: report when OA metrics are unavailable	2026-04-13 21:31:51 +00:00
shaders	intel/shaders: Build for Xe3P (GFX_VERx10 == 350)	2026-03-04 11:10:34 -08:00
tools	intel/tools: Add xe3p format for intel_monitor	2026-03-26 07:31:09 +00:00
vulkan	anv: expose VK_KHR_shader_constant_data	2026-04-23 19:02:27 +00:00
vulkan_hasvk	hasvk: unbreak assert format != ISL_FORMAT_UNSUPPORTED	2026-04-22 20:35:25 +00:00
meson.build	brw: Move into a new src/intel/compiler/brw subdirectory	2025-10-09 07:01:47 +00:00