José Roberto de Souza 740e596c62 intel: Add a write combining PAT entry ... Iris and ANV will need to switch to this PAT entry for BOs without special needs. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>		2023-11-08 01:20:42 +00:00
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blorp	blorp: handle binding table & surface state allocation failures	2023-10-30 14:47:18 +00:00
ci	anv: uninitialize queues before utrace	2023-10-19 09:45:36 +00:00
common	intel/dev: Rename mtl-m to mtl-u	2023-11-07 06:37:00 +00:00
compiler	nir: Also gather decomposed primitive count	2023-11-07 00:05:54 +00:00
dev	intel: Add a write combining PAT entry	2023-11-08 01:20:42 +00:00
ds	intel/ds: provide names for different events of a timeline's row	2023-10-17 11:19:13 +00:00
genxml	intel/genxml: add the Gen12+ TR-TT registers	2023-11-04 02:06:52 +00:00
isl	isl: Enable MCS compression on ACM platform	2023-11-07 23:00:18 +00:00
nullhw-layer	meson: support installation tags	2023-09-11 13:00:45 +00:00
perf	intel/dev: Rename mtl-p to mtl-h	2023-11-07 06:37:00 +00:00
tools	intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c	2023-09-06 01:39:53 +00:00
vulkan	intel: Add more information about the PAT entry used	2023-11-08 01:20:42 +00:00
vulkan_hasvk	vk/graphics_state, tu: Rewrite renderpass flags handling	2023-11-06 14:33:51 +00:00
meson.build	intel: Only build perf if drivers or tools are enabled	2023-08-31 21:53:19 +00:00