intel: Add a write combining PAT entry

Iris and ANV will need to switch to this PAT entry for BOs without
special needs.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26099>
This commit is contained in:
José Roberto de Souza 2023-09-13 06:51:06 -07:00 committed by Marge Bot
parent 0d668f50dc
commit 740e596c62
2 changed files with 3 additions and 1 deletions

View file

@ -1138,7 +1138,8 @@ static const struct intel_device_info intel_device_info_atsm_g11 = {
.has_ray_tracing = true, \
.pat.coherent = PAT_ENTRY(3, WB, 1WAY), \
.pat.scanout = PAT_ENTRY(1, WC, NONE), \
.pat.writeback = PAT_ENTRY(0, WB, NONE)
.pat.writeback = PAT_ENTRY(0, WB, NONE), \
.pat.writecombining = PAT_ENTRY(1, WC, NONE)
static const struct intel_device_info intel_device_info_mtl_u = {
MTL_FEATURES,

View file

@ -490,6 +490,7 @@ struct intel_device_info
struct intel_device_info_pat_entry coherent;
struct intel_device_info_pat_entry scanout;
struct intel_device_info_pat_entry writeback;
struct intel_device_info_pat_entry writecombining;
} pat;
BITSET_DECLARE(workarounds, INTEL_WA_NUM);