mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-27 21:20:12 +01:00
The HW can technically execute 16-bit operations, but the restrictions on 16-bit ALU ops are so great that it ends up not being a win for GLES-on-Vulkan to lower mediump to 16-bit operations, at least with the current state of the Intel compiler. This brings zink-on-anv in line with iris and angle-on-anv for mediump behavior (ANGLE uses RelaxedPrecision, which we ignore). Perf on some angle traces on my brya (ADL) and i9-9900K (CFL): ADL zink pubg_mobile_battle_royale: +13.4574% +/- 5.2046% (n=5) CFL zink pubg_mobile_battle_royale: +29.5332% +/- 0.646585% (n=6) ADL zink aztec_ruins_high: +5.78027% +/- 4.80645% (n=4) CFL zink aztec_ruins_high: -1.10641% +/- 0.140562% (n=12) ADL zink trex_200: +5.86956% +/- 2.09633% (n=10) CFL zink trex_200: +9.72136% +/- 0.749261% (n=10) Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21775> |
||
|---|---|---|
| .. | ||
| blorp | ||
| ci | ||
| common | ||
| compiler | ||
| dev | ||
| ds | ||
| genxml | ||
| isl | ||
| nullhw-layer | ||
| perf | ||
| tools | ||
| vulkan | ||
| vulkan_hasvk | ||
| meson.build | ||