Iago Toral Quiroga 177dcd4b68 broadcom/compiler: be more flexible scheduling TMU writes ... V3D 4.x allows more flexibility, so take advantage of that. Generally, we can reorder any writes in the same sequence, so long as they are not the sequence terminator (which must always be last, since it is the one triggering the operation), and TMUD writes, since these must be ordered with respect to each other. total instructions in shared programs: 13735183 -> 13731927 (-0.02%) instructions in affected programs: 903057 -> 899801 (-0.36%) helped: 2358 HURT: 746 Instructions are helped. total max-temps in shared programs: 2322020 -> 2322009 (<.01%) max-temps in affected programs: 619 -> 608 (-1.78%) helped: 19 HURT: 11 Inconclusive result (value mean confidence interval includes 0). total sfu-stalls in shared programs: 31494 -> 31489 (-0.02%) sfu-stalls in affected programs: 182 -> 177 (-2.75%) helped: 40 HURT: 40 Inconclusive result (value mean confidence interval includes 0). total inst-and-stalls in shared programs: 13766677 -> 13763416 (-0.02%) inst-and-stalls in affected programs: 901343 -> 898082 (-0.36%) helped: 2349 HURT: 746 Inst-and-stalls are helped. Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9555>		2021-03-15 08:03:28 +01:00
..
meson.build	broadcom/compiler: add a constant alu optimization pass	2021-02-23 08:08:01 +00:00
nir_to_vir.c	broadcom/compiler: simplify ldvary pipelining	2021-03-10 07:52:22 +00:00
qpu_schedule.c	broadcom/compiler: be more flexible scheduling TMU writes	2021-03-15 08:03:28 +01:00
qpu_validate.c	broadcom/compiler: don't check for GFXH-1633 on V3D 4.2.x	2021-02-12 08:24:21 +00:00
v3d33_tex.c	broadcom/compiler: support pipelining of tex instructions	2021-02-04 10:33:10 +00:00
v3d33_vpm_setup.c	broadcom/vc5: Move V3D 3.3 VPM write setup to a separate file.	2018-01-12 21:56:24 -08:00
v3d40_tex.c	broadcom/compiler: Add a v3d_compile argument to vir_set_[pu]f	2021-02-12 07:05:33 +00:00
v3d_compiler.h	broadcom/compiler: simplify ldvary pipelining	2021-03-10 07:52:22 +00:00
v3d_nir_lower_image_load_store.c	nir: Make nir_ssa_def_rewrite_uses_after take an SSA value	2021-03-08 16:59:55 +00:00
v3d_nir_lower_io.c	v3d: use intrinsic builders	2021-01-06 14:34:41 +00:00
v3d_nir_lower_line_smooth.c	v3d: use intrinsic builders	2021-01-06 14:34:41 +00:00
v3d_nir_lower_logic_ops.c	v3d: mark some variables static const	2021-01-13 07:24:32 +00:00
v3d_nir_lower_robust_buffer_access.c	v3d/compiler: add a lowering pass for robust buffer access	2020-10-13 21:21:33 +00:00
v3d_nir_lower_scratch.c	nir: Make nir_ssa_def_rewrite_uses take an SSA value	2021-03-08 16:59:55 +00:00
v3d_nir_lower_txf_ms.c	v3d: Use nir_shader_lower_instructions() for txf_ms lowering.	2019-07-18 11:28:56 -07:00
vir.c	v3d: Replace driver lowering of GL_CLAMP with mesa/st's.	2021-02-24 18:03:46 +00:00
vir_dump.c	broadcom/compiler: name registers correctly based on V3D version	2021-02-12 08:24:21 +00:00
vir_live_variables.c	util/hash_table: update users to use new optimal integer hash functions	2020-01-23 17:06:57 +00:00
vir_opt_constant_alu.c	broadcom/compiler: add a constant alu optimization pass	2021-02-23 08:08:01 +00:00
vir_opt_copy_propagate.c	v3d: Use ldunif instructions for uniforms.	2019-03-05 12:57:39 -08:00
vir_opt_dead_code.c	broadcom/compiler: drop the destination for unused ldunifa	2021-03-04 09:00:15 +01:00
vir_opt_redundant_flags.c	v3d: fix checking twice auf flag	2019-06-13 11:45:18 +02:00
vir_opt_small_immediates.c	v3d: Use ldunif instructions for uniforms.	2019-03-05 12:57:39 -08:00
vir_register_allocate.c	broadcom/compiler: use a helper function to decide on TMU spilling	2021-02-17 09:01:02 +01:00
vir_to_qpu.c	broadcom/compiler: emit ldunifarf when needed	2021-02-12 08:24:21 +00:00