mesa/src/panfrost/compiler
Boris Brezillon 2611dc106a pan/bi: Disallow non-zero .{range,base} on load_push_constant instructions
There seems to be several lowering pass that don't take the base/range
into account, like nir_lower_mem_access_bit_sizes(). This caused
issues when we tried using it on push_constants to make sure accesses
are 32-bit aligned, so let's make sure the frontend is propagating the
base to the offset, and assigns range to zero (AKA undefined).

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32415>
2025-01-07 08:15:19 +00:00
..
bifrost panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
test bi: Rewrite dead code elimination 2024-08-20 10:03:30 +02:00
valhall panfrost/va: add FLUSH instruction 2025-01-03 20:53:36 +00:00
bi_builder.h.py panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
bi_helper_invocations.c panvk: Properly propagate helper invocations requirement 2024-08-21 18:47:02 +00:00
bi_layout.c
bi_liveness.c
bi_lower_divergent_indirects.c pan,nir: introduce load_attribute_pan 2024-12-18 08:33:16 +00:00
bi_lower_swizzle.c
bi_opcodes.c.py panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
bi_opcodes.h.py panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
bi_opt_constant_fold.c panfrost: fix shift overflow in bi_fold_constant 2024-01-26 09:40:48 +00:00
bi_opt_copy_prop.c
bi_opt_cse.c bi: Alloc replacement array once in opt_cse 2024-05-24 11:16:31 +02:00
bi_opt_dce.c bi: Rewrite dead code elimination 2024-08-20 10:03:30 +02:00
bi_opt_dual_tex.c
bi_opt_mod_props.c
bi_opt_push_ubo.c pan/bi: Lower ubo table in indices for Valhall 2024-03-11 09:23:56 +00:00
bi_packer.c.py panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
bi_pressure_schedule.c
bi_print.c
bi_print_common.c
bi_print_common.h
bi_printer.c.py panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
bi_quirks.h
bi_ra.c
bi_test.h
bi_validate.c
bifrost.h pan/bi: Expose the packed TextureOperationDescriptor in bifrost_texture_operation 2024-11-05 11:20:21 +00:00
bifrost_compile.c pan/bi: Disallow non-zero .{range,base} on load_push_constant instructions 2025-01-07 08:15:19 +00:00
bifrost_compile.h gallium: replace PIPE_SHADER_CAP_INDIRECT_INPUT/OUTPUT_ADDR with NIR options 2024-12-03 12:57:36 +00:00
bifrost_isa.py panfrost: Update bifrost_isa.py to handle some Valhall constructs 2024-08-20 12:18:19 +00:00
bifrost_nir.h
bifrost_nir_algebraic.py nir: make fclamp_pos_mali and fsat_signed_mali opcodes generic 2024-10-03 09:02:07 +00:00
bir.c pan/va: Define the TEX_GRADIENT instruction 2024-10-23 11:02:38 +00:00
cmdline.c
compiler.h panfrost/va: add FLUSH instruction 2025-01-03 20:53:36 +00:00
gen_disasm.py bi: Move bi_disasm definitions to their own header 2024-06-17 07:31:50 +00:00
IR_pseudo.xml panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
meson.build panfrost: split pseudo instructions from Bifrost and Valhall 2024-08-20 12:18:19 +00:00
nodearray.h
Notes.txt
README.md

Bifrost compiler

Register file

Defined partially in software, partially in hardware.

Blend shaders

R0 - R3: input (color #0) R4 - R7: input (color #1) R8 - R15: general purpose R48: return address

Fragment

Anything live during BLEND must respect blend shader registers.

R0 - R3: preloaded (message #0) R4 - R7: preloaded (message #1) R57 - R63: preloaded (various)

R0 - R15: general purpose (full threads) R48 - R63: general purpose (full threads)

R32 - R47: general purpose (half threads, or v6)