Georg Lehmann 250f423546 aco: clamp exponent of 16bit ldexp ... The hw uses only a 16bit int, but NIR's src is 32bit. Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34073> (cherry picked from commit a6675f35b2)		2025-06-04 15:52:49 +02:00
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addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	ci/deqp: fix vulkan video build	2025-04-15 17:23:05 +00:00
common	radv,radeonsi: emit UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12	2025-06-04 15:52:49 +02:00
compiler	aco: clamp exponent of 16bit ldexp	2025-06-04 15:52:49 +02:00
drm-shim	amd/drm-shim: add gfx1201	2025-03-10 11:21:36 +00:00
gmlib	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00
llvm	ac/llvm: correctly set alignment of vector global load/store	2025-05-20 20:18:05 +02:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: More parameters to the segmentation process and introduce validation hook	2025-03-06 02:11:53 +00:00
vulkan	radv/rt: Report 256 byte alignment for scratch	2025-06-04 15:52:49 +02:00
meson.build	amd/gmlib: add gmlib for radeonsi	2025-02-27 03:15:16 +00:00