Georg Lehmann 004f8aa2f4 aco: optimize get_alu_src with constant source and size > 1 ... Emulated FSR4, Navi31: Totals from 14 (100.00% of 14) affected shaders: MaxWaves: 130 -> 131 (+0.77%) Instrs: 67887 -> 67470 (-0.61%); split: -0.70%, +0.09% CodeSize: 464428 -> 461668 (-0.59%); split: -0.67%, +0.07% VGPRs: 2544 -> 2520 (-0.94%) SpillVGPRs: 92 -> 89 (-3.26%) Latency: 256823 -> 257574 (+0.29%); split: -0.37%, +0.66% InvThroughput: 253895 -> 252929 (-0.38%); split: -0.40%, +0.02% VClause: 997 -> 984 (-1.30%); split: -2.11%, +0.80% Copies: 4501 -> 3788 (-15.84%); split: -17.35%, +1.51% PreSGPRs: 504 -> 519 (+2.98%) PreVGPRs: 2460 -> 2448 (-0.49%) VALU: 57202 -> 56726 (-0.83%); split: -0.88%, +0.05% SALU: 1231 -> 1384 (+12.43%) VMEM: 3807 -> 3801 (-0.16%) VOPD: 2693 -> 2303 (-14.48%); split: +1.19%, -15.67% Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36090>		2025-07-25 11:33:00 +00:00
..
addrlib	amd/addrlib: remove the DCC page fault workaround	2025-04-01 03:23:22 -04:00
ci	radv/ci: Update navi10 and vega10 expected failures	2025-07-25 07:28:41 +00:00
common	nir: add nir_tex_instr::can_speculate	2025-07-24 18:41:38 +00:00
compiler	aco: optimize get_alu_src with constant source and size > 1	2025-07-25 11:33:00 +00:00
drm-shim	amd: Add user queue HQD count to hw_ip info	2025-07-08 10:17:51 +00:00
gmlib	amd/gmlib: remove the executable bit	2025-06-12 07:44:27 +00:00
lanczoslib	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00
llvm	ac/llvm: fix readlane with vectors	2025-07-24 06:31:17 +00:00
registers	amd: Rename GFX1103_R1/R2 to PHOENIX/2	2024-11-20 02:14:40 +00:00
vpelib	amd/vpelib: Fix CodeQL issues Pt1	2025-05-16 11:33:08 +08:00
vulkan	radv/video: Use the new defines for H264 SPS info flags	2025-07-25 09:32:08 +00:00
meson.build	radeonsi/vpe: enhance scaling quality	2025-06-12 07:44:26 +00:00