Commit graph

5338 commits

Author SHA1 Message Date
Mike Blumenkrantz
ffe54ca293 nir/linking: fix nir_assign_io_var_locations for scalarized dual blend
this would previously assign all scalar variables to the highest
driver location

cc: mesa-stable

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28753>
2024-05-18 13:50:27 +00:00
Marek Olšák
b4bd380704 nir/algebraic: eliminate pack+unpack and unpack+pack pairs
A new NIR shader for AMD drivers will need this.

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29233>
2024-05-17 22:04:00 +00:00
Alyssa Rosenzweig
9a8cb81f61 nir/tex_instr_result_size: handle subpass_ms
I hit this and don't see any reason it shouldn't work

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29249>
2024-05-16 18:09:39 -04:00
Karol Herbst
564e569072 nir/lower_cl_images: set binding also for samplers
Fixes https://github.com/darktable-org/darktable/issues/16717 on radeonsi.

Fixes: 31ed24cec7 ("nir/lower_images: extract from clover")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29230>
2024-05-16 16:39:42 +00:00
Francisco Jerez
15a10786e3 nir: Add option to lower 64-bit uadd_sat.
C.f. 16be909936.  Intel Xe2 won't
support saturation for 64-bit integer addition, regardless of
signedness.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28283>
2024-05-15 17:16:51 +00:00
Lionel Landwerlin
ecbec25e84 intel/nir: add reloc delta to load_reloc_const_intel intrinsic
We'll use the delta for an upcoming internal printf mechanism, where
the PARAM_IDX will be the base printf reloc identifier and the BASE
will be the string id.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:38 +00:00
Lionel Landwerlin
c16e58eabd nir: add a low level printf emission helper
Uses the same memory layout as the print intrinsic lowering. This one
just let's you do the emission without having to deal with variables.

This useful for debug traces.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
c518a176f5 nir: add ptr_bit_size parameter to nir_lower_printf
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
2be28ee58a nir: add a base offset for printf indexing
This will allow a driver to use a single table of printf strings
across all shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:37 +00:00
Lionel Landwerlin
8d336f069e nir/divergence: add missing load_printf_buffer_address
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>
2024-05-15 13:13:37 +00:00
Alyssa Rosenzweig
eb5f82d221 nir,agx: fix load_active_subgroup_index
It can't be reordered globally, since its value is control-flow dependent.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
7fb60c4c81 nir,agx: add depth=never workaround
There seems to be a hardware issue where fragment shaders with side effects get
skipped if depth testing with NEVER. Add a workaround for this case where we
discard programmatically instead.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
2024-05-14 04:57:25 +00:00
Alyssa Rosenzweig
9d824bd123 nir: add quad_ballot_agx intrinsic
to lower quad votes in nir.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
2024-05-14 04:57:24 +00:00
Alyssa Rosenzweig
2912f531a7 nir: add texops for AGX border colour emulation
AGX has limited border colour hardware. To support full
customBorderColorWithoutFormat semantics, we're forced to emulate in shaders at
a substantial performance penalty. Actually, that's needed just to pass CTS
because of other hardware issues stacking on top of each others... Hooray!

Add the texops we need to facilitate efficient custom border colour lowering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
2024-05-14 04:57:24 +00:00
Alyssa Rosenzweig
8b9ed851ec nir: add is_first_fan_agx sysval
needed for correct flatshading with fans, without falling back on software input
assembly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
2024-05-14 04:57:24 +00:00
Juan A. Suarez Romero
87cd11ecd2 nir,v3d: rename tlb_color_v3d intrinsic
As this is intended to be used also by VC4, change the suffix to
something more convenient, like tlb_color_brcm.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29119>
2024-05-13 10:44:17 +00:00
Dr. David Alan Gilbert
8b6b327d1b treewide: Cleanup unused structs
vk/wsi: Remove unused struct 'wsi_headless_format'

'wsi_headless_format' appears unused, and seems
to have been since initial commit.

radv: Remove unused struct 'blit_region'

'blit_region' appears unused, I think since initial commit.

r600: Remove unused structs

'eg_interp' and 'r600_shader_src' are unused.
I think they are just leftovers from the cleanup
in 20e6c31ba6.

i915: Remove unused struct 'i915_tracked_hw_state'

'i915_tracked_hw_state' appears unused. I think it's just
a leftover from 179cb58795.

llvmpipe: Remove unused struct 'linear_interp'

'linear_interp' doesn't ever seem to have been used.

radeonsi: Remove unused struct 'texture_orig_info'

'texture_orig_info' seems unused, I think since 46b2b3bda8.

svga: Remove unused struct 'svga_3d_invalidate_gb_image'

'svga_3d_invalidate_gb_image' appears unused since 1942c06f9c.
Remove it.

nir: Remove unused struct 'split_struct_state'

'split_struct_state' looks unused since the original commit.

Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29105>
2024-05-11 17:30:59 +00:00
Alyssa Rosenzweig
3ccf7208a2 nir/lower_robust_access: also handle image derefs
for unlowered image intrinsics

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28681>
2024-05-10 17:49:13 +00:00
Alyssa Rosenzweig
fb187c9c89 nir/lower_subgroups: relax ballot_type_to_uint
we can generate 32-bit scalar inverse_ballots from the boolean reduce lowering
which will blow up when trying to lower the resulting inverse_ballot with the
common lowering. but the assert can be quieted just fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig
b9a0c8dc6d nir/lower_subgroups: add generic scan/reduce lower
this is the lowering from NAK, fixed up for common code. the existing code is
used for boolean scan/reduce. I make no guarantee that this works for subgroup
sizes other than 32.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Alyssa Rosenzweig
8b070c36ec nir/lower_subgroups: add filter
this will be useful for AGX, which has many reductions (but not all) in
hardware with the logic too backend-specific to encode with bitflags.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28993>
2024-05-10 17:00:54 +00:00
Saroj Kumar
221371e903 mesa: replace shader_info::source_sha1
Replace shader_info::source_sha1 with shader_info::source_blake3 in compiler, mesa and radeonsi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28156>
2024-05-09 20:08:18 +00:00
Rhys Perry
9d2711fcb8 nir/dead_cf: stop reindexing blocks for each non-block cf node
This is faster, especially for large shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29085>
2024-05-09 09:57:10 +00:00
Karol Herbst
569c2fcf95 nir: fix nir_shader_get_function_for_name for functions without names.
It's legal in SPIRV for functions to not have names, we have to take this
into account when calling into strcmp here.

Fixes: 2aa9eb497d ("nir: Add a helper for finding a function by name")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29063>
2024-05-06 16:45:51 +00:00
Georg Lehmann
603982ea80 nir/opt_16bit_tex_image: optimize packed conversions too
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
2024-05-04 15:01:45 +00:00
Georg Lehmann
eeed928111 nir/opt_16bit_tex_image: pass options to opt_16bit_dest
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28730>
2024-05-04 15:01:45 +00:00
Ian Romanick
1b8cf06fc7 nir/algebraic: Optimize some extract_* expressions
v2: Add missing '!options->lower_extract_byte' to the last two
patterns. Every driver except Asahi sets both or neither.

shader-db:

All Intel platforms had similar results. (DG2 shown)
total instructions in shared programs: 19659360 -> 19659356 (<.01%)
instructions in affected programs: 44 -> 40 (-9.09%)
helped: 2 / HURT: 0

total cycles in shared programs: 823432524 -> 823432520 (<.01%)
cycles in affected programs: 1722 -> 1718 (-0.23%)
helped: 2 / HURT: 0

fossil-db:

All Intel platforms had similar results. (DG2 shown)
Totals:
Instrs: 153989787 -> 153989617 (-0.00%)
Cycle count: 17562079230 -> 17562079493 (+0.00%); split: -0.00%, +0.00%

Totals from 24 (0.00% of 631369) affected shaders:
Instrs: 13733 -> 13563 (-1.24%)
Cycle count: 341392 -> 341655 (+0.08%); split: -0.25%, +0.33%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com> [v1]
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27891>
2024-05-03 15:01:43 -07:00
Daniel Schürmann
6b4b044739 nir/opt_loop: add loop peeling optimization
This optimization turns:

     loop {
        do_work_1();
        if (cond) {
           break;
        } else {
        }
        do_work_2();
     }

 into:

     do_work_1();
     if (cond) {
     } else {
        loop {
           do_work_2();
           do_work_1();
           if (cond) {
              break;
           } else {
           }
        }
     }

RADV GFX11:
Totals from 925 (1.17% of 79395) affected shaders:
MaxWaves: 20583 -> 20455 (-0.62%)
Instrs: 5260489 -> 5361418 (+1.92%); split: -0.63%, +2.55%
CodeSize: 26965388 -> 27501104 (+1.99%); split: -0.48%, +2.47%
VGPRs: 70304 -> 70712 (+0.58%)
SpillSGPRs: 2163 -> 2159 (-0.18%)
Scratch: 51200 -> 69632 (+36.00%)
Latency: 36404844 -> 34542213 (-5.12%); split: -5.51%, +0.39%
InvThroughput: 6628474 -> 6384249 (-3.68%); split: -4.19%, +0.50%
VClause: 124997 -> 127008 (+1.61%); split: -0.43%, +2.04%
SClause: 121774 -> 120799 (-0.80%); split: -3.21%, +2.40%
Copies: 357048 -> 360850 (+1.06%); split: -0.62%, +1.68%
Branches: 171985 -> 168082 (-2.27%); split: -3.61%, +1.34%
PreSGPRs: 59812 -> 60088 (+0.46%); split: -0.20%, +0.66%
PreVGPRs: 60325 -> 60586 (+0.43%); split: -0.29%, +0.72%
VALU: 2882263 -> 2951373 (+2.40%); split: -0.37%, +2.77%
SALU: 636373 -> 640091 (+0.58%); split: -0.87%, +1.46%
VMEM: 200059 -> 204612 (+2.28%); split: -0.09%, +2.36%
SMEM: 173328 -> 174343 (+0.59%); split: -2.34%, +2.92%
VOPD: 1064 -> 898 (-15.60%); split: +0.09%, -15.70%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
2024-05-03 13:01:29 +00:00
Daniel Schürmann
3a2226be47 nir/opt_if: don't split ALU of phi into otherwise empty blocks
RADV GFX11:
Totals from 1566 (1.97% of 79395) affected shaders:
Instrs: 5663011 -> 5638219 (-0.44%); split: -0.45%, +0.01%
CodeSize: 29760844 -> 29639756 (-0.41%); split: -0.42%, +0.01%
SpillSGPRs: 1750 -> 1603 (-8.40%)
Latency: 62963520 -> 62831280 (-0.21%); split: -0.22%, +0.01%
InvThroughput: 10501171 -> 10490116 (-0.11%); split: -0.11%, +0.00%
VClause: 127928 -> 128054 (+0.10%); split: -0.01%, +0.11%
SClause: 152635 -> 152956 (+0.21%); split: -0.08%, +0.29%
Copies: 476865 -> 461288 (-3.27%); split: -3.28%, +0.02%
Branches: 169038 -> 168104 (-0.55%); split: -0.56%, +0.00%
PreSGPRs: 88851 -> 88356 (-0.56%); split: -0.58%, +0.02%
PreVGPRs: 114565 -> 114559 (-0.01%); split: -0.01%, +0.01%
VALU: 3158023 -> 3157387 (-0.02%); split: -0.03%, +0.01%
SALU: 615028 -> 595360 (-3.20%); split: -3.21%, +0.01%
VMEM: 219891 -> 218287 (-0.73%); split: -0.74%, +0.01%
SMEM: 206956 -> 206484 (-0.23%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
2024-05-03 13:01:29 +00:00
Daniel Schürmann
e74f5b16e3 nir/loop_analyze: adjust negative (or huge) iteration count check for bit size
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28150>
2024-05-03 13:01:29 +00:00
Jesse Natalie
894f7f4387 nir_opt_algebraic: Add a couple optimizations for lowered unpack(pack())
I noticed some unnecessary 64-bit ints in shaders that were using doubles.
Perhaps there's a different missing optimization that should run on the
actual pack/unpack instructions before they're lowered, or maybe I'm just
lowering them too early, but these seem simple enough that we might want
them even for hand-rolled pack/unpack pairs.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27314>
2024-05-01 21:55:20 +00:00
Marek Olšák
d802aca523 nir/lower_image: support FMASK loads with a 16-bit sample index
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
2024-05-01 19:41:35 +00:00
Marek Olšák
a01712874d nir/lower_tex: support FMASK loads with a 16-bit sample index
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
2024-05-01 19:41:35 +00:00
Marek Olšák
fcb627945b nir: add more build helpers
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
2024-05-01 19:41:35 +00:00
Marek Olšák
1632948a76 nir: validate src_type of store_output intrinsics, require bit_size >= 16
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28845>
2024-05-01 19:41:35 +00:00
Marek Olšák
f9d78f110c nir: add sleep intrinsics for AMD
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
2024-04-30 17:17:25 +00:00
Marek Olšák
b06a71b3cd nir: add streamout intrinsics for AMD GFX12
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
2024-04-30 17:17:25 +00:00
Marek Olšák
1a791c1303 nir: add nir_atomic_op_ordered_add_gfx12_amd
for streamout

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
2024-04-30 17:17:25 +00:00
Marek Olšák
d4cfcbdde8 nir: add ACCESS_CP_GE_COHERENT_AMD
required by amd gfx12

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28889>
2024-04-30 17:17:25 +00:00
Konstantin Seurer
ea863c0c1c nir/print: Do not access invalid indices of load_uniform
load_uniform does not have io_semantics and component.

Fixes: a83fd26 ("nir/print: stop trying to match i/o vars using base/driver_location")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28962>
2024-04-28 16:06:46 +02:00
Connor Abbott
32308fe9f1 ir3/nir: Fix imadsh_mix16 definition
The constant-folding definition and comments say that it takes the high
16 bits of the first source and low 16 bits of the second source, but
actually it's the opposite. The algebraic optimization, which actually
happens and needs to be correct, was correct but the comment above it
was wrong.

Note that in the way we use it when lowering multiplications, the
ordering doesn't matter.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075>
2024-04-26 12:55:14 +00:00
Iván Briano
7f97fa6df0 nir/algebraic: move float control conditions to be per instruction
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
2024-04-25 12:13:41 +00:00
Iván Briano
8c4cd3e74e nir/algebraic: support float controls conditions per instruction
v?:
 - Make the Python not awful (Dylan)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
2024-04-25 12:13:41 +00:00
Iván Briano
08df0c7dde nir: check inf/nan/sz preserve per-instruction
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
2024-04-25 12:13:41 +00:00
Iván Briano
666647acae nir: track some float controls bits per instruction
With float_controls2, shaders can decide on the behavior of
NaN/Inf/SignedZero preservation by decorating specific instructions, on
top of having a default for the whole program.
Add where to track these to nir_alu_instr and propagate them to new
instructions everywhere that exact is being done already.

v2: use less bits for fp_fast_math in nir_alu_instr (Alyssa)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27281>
2024-04-25 12:13:41 +00:00
Karol Herbst
5e1a988003 nir: document base_global_invocation_id and base_workgroup_id
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:49 +00:00
Karol Herbst
d22f936019 nir: remove workgroup_id_zero_base
This removes the need for drivers to handle both versions. The base will
get added once in nir_lower_system_values when converting from deref to
intrinsic and will be replaced by a zero for users not supporting it.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:49 +00:00
Karol Herbst
3217838fef nir: remove global_invocation_id_zero_base
This removes the need for drivers to handle both versions. The base will
get added once in nir_lower_system_values when converting from deref to
intrinsic and will be replaced by a zero for users not supporting it.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:49 +00:00
Karol Herbst
3625a44dcc nir/divergence_analysis: handle load_base_global_invocation_id
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:48 +00:00
Karol Herbst
25d697ef25 nir: add SYSTEM_VALUE_BASE_WORKGROUP_ID
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26800>
2024-04-24 20:18:48 +00:00