Commit graph

216778 commits

Author SHA1 Message Date
Bas Nieuwenhuizen
82d06b58ad radv: use vk_drm_syncobj_copy_payloads
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Based on a patch by llyyr <llyyr.public@gmail.com>:

!36827 added the copy_sync_payloads function, but didn't enable use of
it in radv. This commit mirrors similar MRs for anv/panvk/nvk and uses
the common vk_drm_syncobj_copy_payloads function for copy_sync_payloads.

I'm not too familiar with radv internals, so there's potentially a good
reason why this isn't a good change. However, I've personally been using
this patch locally for around a month and have experienced no
regressions and around 8% uplift on vkmark test scores with a 6600 XT.

[vertex] device-local=true: 45110 -> 48489 (+7.5%)
[vertex] device-local=false: 17529 -> 17488 (-0.2%)
[texture] anisotropy=0: 44768 -> 48679 (+8.7%)
[texture] anisotropy=16: 44920 -> 48572 (+8.1%)
[shading] shading=gouraud: 44931 -> 48467 (+7.9%)
[shading] shading=blinn-phong-inf: 44849 -> 48740 (+8.7%)
[shading] shading=phong: 44695 -> 48645 (+8.8%)
[shading] shading=cel: 44809 -> 47938 (+7.0%)
[effect2d] kernel=edge: 45185 -> 47837 (+5.9%)
[effect2d] kernel=blur: 26919 -> 26762 (-0.6%)
[desktop] <default>: 40974 -> 44034 (+7.5%)
[cube] <default>: 45090 -> 49270 (+9.3%)
[clear] <default>: 41102 -> 44375 (+8.0%)

(https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37606)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37640>
2025-10-06 00:45:09 +00:00
Mary Guillemard
b0d2d4537f nouveau/headers: Properly reformat nv_push_dump
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It was using 2 spaces, this run clang-format on it.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37700>
2025-10-05 15:14:37 +02:00
Mary Guillemard
f3a5e6df95 nouveau/headers: Add missing Kepler, Maxwell and Pascal defs to nv_push_dump
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37700>
2025-10-05 15:14:37 +02:00
Mary Guillemard
ec223859a8 nouveau/headers: Define fake devices in a table for nv_push_dump
This was getting quie big... also fix KEPLER_A missing compute channel.

This now make it possible to also specify by generation full name while
retaining compat with the old names.

Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37700>
2025-10-05 15:14:37 +02:00
Timothy Arceri
2f799ef0f1 Reapply "ci/freedreno: Skip overly-slow trace"
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This reverts commit e2217192fa.

Unfortunately this is still timing out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37709>
2025-10-05 17:50:06 +11:00
Timothy Arceri
e2217192fa Revert "ci/freedreno: Skip overly-slow trace"
This reverts commit 1754bfa94a.

The timeout issue should be solve by the previous commit.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37386>
2025-10-05 05:29:36 +00:00
Timothy Arceri
db2126f8ef util: rewrite remap util to avoid looping list
Here we write the binary search to avoid looping over the list
by keeping track of the mid point entries and moving directly
from the last test point.

Fixes: bf946bcc ("util: add range remap util")

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37386>
2025-10-05 05:29:36 +00:00
Timothy Arceri
57ac68f616 util: add shortcut for range remap inserts
The user of this insert function often just inserts things in a
consecutive manner. So here we add a shortcut for inserting entries
at the tail of the list.

Fixes: bf946bccf2 ("util: add range remap util")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13894

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37386>
2025-10-05 05:29:36 +00:00
Mauro Rossi
dd2476a257 amd: require LLVM when amd-use-llvm is enabled
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Commit 2aaa6ebb "build/amd: add amd-use-llvm build option"
allows to build radeonsi and radv without LLVM dependency
so LLVM constraint is applicable when amd-use-llvm=true

Fixes: 82047fa8 ("amd: drop support for LLVM 15, 16, 17")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37695>
2025-10-04 11:57:44 +02:00
Collabora's Gfx CI Team
7ef5653b11 Uprev ANGLE to 538129c6b3c17dc864101c7a4af4b74b00706f82
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1df3b59f87...538129c6b3

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37356>
2025-10-04 07:14:50 +00:00
Rob Clark
bd5ed33bb1 freedreno: Allow TC async fences to have an fd
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We don't need to have this restriction, we just need to fence_flush()
before trying to access the fd.  This path is exercised in CL CTS
gl-interop test if cl_gl_sharing is exposed.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37696>
2025-10-03 23:44:40 +00:00
Rob Clark
c1147980e5 freedreno: Always use aux-ctx for export blits
If we need to blit a resource to a buffer that can be exported (ie.
because it was suballocated, etc), always use the aux-context.  This
can be called off of the driver thread, so it isn't thread-safe to
use the main context, even if it is not NULL.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37696>
2025-10-03 23:44:40 +00:00
Rob Clark
838ac4b736 freedreno: Handle buffer import
The layout_resource_for_handle() path is only intended for images/
textures.  For buffers, call fdl_layout_buffer() directly.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37696>
2025-10-03 23:44:40 +00:00
Rob Clark
383508cb9f freedreno/a6xx: Drop arbitrary import restrictions
As long as fdl is happy to layout the imported buffer type, we shouldn't
restrict it further.  The cl_gl_sharing extends import/export beyond
winsys buffers, and these restrictions were getting in the way.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37696>
2025-10-03 23:44:39 +00:00
Rob Clark
ffcb8d0b89 freedreno/fdl: Set pitch for buffers
In the import path, we test pitch.  So if we are to be able to import
buffers, we should also set the pitch for buffers.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37696>
2025-10-03 23:44:39 +00:00
Lionel Landwerlin
0922a0dd50 nir/lower_tex: remove unused options
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
2025-10-03 20:19:03 +00:00
Lionel Landwerlin
a49cf90e14 elk: use the new lower_txd_cb
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
2025-10-03 20:19:03 +00:00
Lionel Landwerlin
a14fee571b elk: remove txd bindless sampler lowering
The bindless sampler heap was introduced in Gfx11 which ELK doesn't
support.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
2025-10-03 20:19:03 +00:00
Lionel Landwerlin
bc8251673d brw: use the new lower_txd_cb
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
2025-10-03 20:19:03 +00:00
Lionel Landwerlin
97dde5bc10 nir/lower_tex: add an callback to lower txd ops
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Anne Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37692>
2025-10-03 20:19:02 +00:00
Karol Herbst
1db77d08e2 clc: Fix createDiagnostics for LLVM-22
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Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13986
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37690>
2025-10-03 18:44:30 +00:00
Karol Herbst
9f67cc1510 libagx: fix heap argument type in libagx_draw_robust_index
Fixes: d339bf7a98 ("libagx: rename agx_geometry_state to agx_heap")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37690>
2025-10-03 18:44:30 +00:00
Iván Briano
ac182d6045 brw/mesh: drop brw_tue_map::per_task_data_start_dw
It's always set to a fixed value and not used in many places. Use the
value directly where it's needed.

Suggested-by: Lucas Fryzek <lfryzek@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37648>
2025-10-03 17:36:43 +00:00
Iván Briano
e624174134 anv: handle compiling of mesh shader separately from task shader
With EXT_shader_object, it became possible to compile shaders
independently and then use them together later, so we cannot rely on the
lack of task shader data to decide that no task shader will be used. The
flag VK_SHADER_CREATE_NO_TASK_SHADER_BIT_EXT exists for that purpose,
but it doesn't really make any difference for us. Always assume that if
the mesh shader is reading the task payload, it's going to be used with
one, as otherwise the application is doing it wrong.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13983
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37648>
2025-10-03 17:36:43 +00:00
Rob Clark
7034e65bba freedreno/decode/scripts: Add license comments
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Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37689>
2025-10-03 16:35:05 +00:00
Yinjie Yao
f0f95a9ae3 ac/parse_ib: Update vcn ib parser to include missing commands
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37672>
2025-10-03 14:44:07 +00:00
Samuel Pitoiset
38892cb558 radv: only expose AMD_device_coherent_memory if actually supported
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This fixes an issue after a recent update to
dEQP-VK.info.device_mandatory_features.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37663>
2025-10-03 14:26:32 +00:00
Samuel Pitoiset
e2db50c97b Revert "radv/ci: document recent unexpected failures on TAHITI"
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This reverts commit abd2a79264.

Fixed by 93ce29c42e ("amd: don't allow unsigned wraps for shared
memory offsets on GFX6").

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37685>
2025-10-03 13:37:16 +02:00
Ritesh Raj Sarraf
0e80e831f8 ci/android: Use prebuilt cuttlefish packages from ci-deb-repo
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Make use of the prebuilt cuttlefish packages from the Debian
Trixie base. These packages are built and published to an apt
repository under ci-deb-repo

Signed-off-by: Ritesh Raj Sarraf <ritesh.sarraf@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37633>
2025-10-03 10:04:39 +00:00
Ritesh Raj Sarraf
1f7fae992c ci: Update to latest revision from ci-deb-repo
The latest revision includes built packages for cuttlefish from
ci-deb-repo

Signed-off-by: Ritesh Raj Sarraf <ritesh.sarraf@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37633>
2025-10-03 10:04:39 +00:00
Christian Gmeiner
553e4252ba pvr, pco: Set has_f2i32_rtne to true
Set the has_f2i32_rtne shader compiler option to indicate hardware
support for it. This enables NIR's late algebraic optimization pass to
generate more efficient code for float-to-int conversions.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37680>
2025-10-03 11:12:44 +02:00
Juan A. Suarez Romero
37507f26df v3d/ci: update expected results
Remove failing test, as it passes now.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37676>
2025-10-03 08:30:14 +00:00
Daniel Schürmann
0e3bc3d8c0 nir/opt_offsets: call allow_offset_wrap() for try_fold_shared2()
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This prevents applying wrapping offsets on GFX6.

Fixes: e1a692f74b ('nir/opt_offsets: allow for unsigned wraps when folding load/store_shared2_amd offsets')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37667>
2025-10-03 07:54:12 +00:00
Daniel Schürmann
93ce29c42e amd: don't allow unsigned wraps for shared memory offsets on GFX6
Fixes: 10266e7b21 ('radv: allow for unsigned wraps for shared memory intrinsics in nir_opt_offsets')
Fixes: dd68825feb ('radeonsi: allow for unsigned wraps for shared memory intrinsics in nir_opt_offsets')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37667>
2025-10-03 07:54:12 +00:00
Christian Gmeiner
b78c6bda21 etnaviv: Expose faked xfb support when DEQP debug flag is enabled
Makes running deqp easier on GPUs without HWTFB.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37673>
2025-10-03 07:37:33 +00:00
Kenneth Graunke
29d30c6f3d brw: Only skip SIMD widths based on pressure if an smaller one compiled
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Sometimes the compute shader workgroup size requires a larger SIMD width
than the minimum in order to fit in the available threads.  In that case
we'll skip the SIMD8 shader, and need to try SIMD16 regardless of how
the register pressure estimate looks.

Fixes: 3af4e63061 ("brw: Skip compilation of larger SIMDs when pressure is too high")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37649>
2025-10-02 16:17:26 -07:00
Alejandro Piñeiro
3b68d122c8 v3d: use directly MESA_TRACE_SCOPE for additional context
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Since commit a7727f692f, MESA_TRACE_SCOPE take printf-like
arguments, so it is easier to write a meaningful label for the CPU
trace.

This commit replaces one MESA_TRACE_FUNC to provide extra info, and as
we are here, we add another MESA_TRACE_SCOPE and a MESA_TRACE_FUNC to
track the bo allocation/freeing.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37639>
2025-10-02 23:22:26 +02:00
Alyssa Rosenzweig
c2ae207e80 brw,anv: use XML-based stats
I didn't bother switching either iris or elk/hasvk but one could.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517>
2025-10-02 20:22:00 +00:00
Alyssa Rosenzweig
b575b0954a util/shader_stats: allow "hidden" stats
to allow drivers to do more complex printing without needing a subclass
paradigm. To be used on Intel.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37517>
2025-10-02 20:22:00 +00:00
Valentine Burley
040201d46a ci: Remove lava-job-submitter, LAVA containers, and tests
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lava-job-submitter has been moved to a new repository:
https://gitlab.freedesktop.org/gfx-ci/lava-job-submitter

Remove the LAVA-related code from Mesa, since we now use the containers
built in that repository. These containers already include
lava-job-submitter and run the relevant tests there.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37510>
2025-10-02 18:31:56 +00:00
Valentine Burley
215199af88 ci/lava: Use lava-job-submitter from gfx-ci repo
lava-job-submitter has been moved to a new repository:
https://gitlab.freedesktop.org/gfx-ci/lava-job-submitter

Switch to using the containers built in that repository.
The new lava-trigger container already includes lava-job-submitter
pre-installed, along with the new FDO CI bash helpers from ci-templates.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37510>
2025-10-02 18:31:56 +00:00
José Roberto de Souza
c008d21947 intel/brw: Move brw_s0() to brw_reg.h
It remove a duplication and also it will be used in a future patch
from other file.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37670>
2025-10-02 10:46:10 -07:00
abdelhadi
5c82a3e114 aco: fix debug info offset
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Signed-off-by: abdelhadi <abdelhadims@icloud.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37244>
2025-10-02 13:38:56 +00:00
Samuel Pitoiset
abd2a79264 radv/ci: document recent unexpected failures on TAHITI
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37664>
2025-10-02 13:10:32 +00:00
Collabora's Gfx CI Team
63b3545ba7 Uprev Piglit to a70c33045c59310f972dbbdb33f322eb209971bc
517270ccca...a70c33045c

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37387>
2025-10-02 12:10:16 +00:00
no92
cd129dbf8a gallivm: support LLVM 21
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LLVM PR#146819 changed the signature of `setObjectLinkingLayerCreator`,
dropping the Triple argument. The PR was first included in the LLVM 21
series, and the new signature is gated behind a version check for that.

`LLVMOrcThreadSafeContextGetContext` was removed in LLVM commit b18e5b6,
and the ORC examples in the LLVM tree seem to just create a context
instead, which we replicate here.

With this commit, mesa successfully builds the llvmpipe gallium driver
on riscv64 with LLVM 21.1.0.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13785
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13852

Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37027>
2025-10-02 11:40:21 +00:00
Vitaliy Triang3l Kuzmin
dea20be1b3 ac: Enable HTILE TC Z clear value bug workaround on GFX1013
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:50 +00:00
Vitaliy Triang3l Kuzmin
290f75eba9 radeonsi: Use radeon_info bug flags in TILE_STENCIL_DISABLE setup
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:50 +00:00
Vitaliy Triang3l Kuzmin
fe165f4e2a radeonsi: Disable TC-compatible HTILE when bug workarounds conflict
GFX1013 has bugs that need mutually exclusive workarounds.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:49 +00:00
Vitaliy Triang3l Kuzmin
4e3a5f60e1 radv,ac: Split has_tc_compat_zrange_bug into Z and ZS, document it
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33962>
2025-10-02 08:29:49 +00:00