radv: allow for unsigned wraps for shared memory intrinsics in nir_opt_offsets

Totals from 76 (0.10% of 79839) affected shaders: (Navi48)

Instrs: 237450 -> 237323 (-0.05%); split: -0.05%, +0.00%
CodeSize: 1276732 -> 1275824 (-0.07%); split: -0.07%, +0.00%
Latency: 1123467 -> 1123387 (-0.01%); split: -0.01%, +0.01%
InvThroughput: 364942 -> 364738 (-0.06%); split: -0.06%, +0.00%
Copies: 20654 -> 20636 (-0.09%); split: -0.09%, +0.00%
Branches: 7326 -> 7327 (+0.01%)
PreSGPRs: 5197 -> 5195 (-0.04%)
PreVGPRs: 3395 -> 3396 (+0.03%)
VALU: 96134 -> 96034 (-0.10%)
SALU: 48059 -> 48041 (-0.04%); split: -0.04%, +0.00%
VOPD: 10 -> 8 (-20.00%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37453>
This commit is contained in:
Daniel Schürmann 2025-09-18 10:12:47 +02:00 committed by Marge Bot
parent e1a692f74b
commit 10266e7b21
3 changed files with 20 additions and 2 deletions

View file

@ -8,6 +8,7 @@
#include "ac_nir.h"
#include "ac_nir_helpers.h"
#include "nir_builder.h"
#include "nir_intrinsics.h"
/* Set NIR options shared by ACO, LLVM, RADV, and radeonsi. */
void ac_nir_set_options(struct radeon_info *info, bool use_llvm,
@ -893,3 +894,16 @@ ac_nir_lower_phis_to_scalar_cb(const nir_instr *instr, const void *_)
return 32 / phi->def.bit_size;
}
bool
ac_nir_allow_offset_wrap_cb(nir_intrinsic_instr *instr, const void *data)
{
switch (instr->intrinsic) {
case nir_intrinsic_load_shared:
case nir_intrinsic_store_shared:
case nir_intrinsic_shared_atomic:
case nir_intrinsic_shared_atomic_swap:
return true;
default: return false;
}
}

View file

@ -441,6 +441,9 @@ ac_nir_store_may_be_subdword(const nir_intrinsic_instr *instr);
uint8_t
ac_nir_lower_phis_to_scalar_cb(const nir_instr *instr, const void *_);
bool
ac_nir_allow_offset_wrap_cb(nir_intrinsic_instr *instr, const void *data);
#ifdef __cplusplus
}
#endif

View file

@ -260,8 +260,9 @@ radv_optimize_nir_algebraic(nir_shader *nir, bool opt_offsets, bool opt_mqsad)
static const nir_opt_offsets_options offset_options = {
.uniform_max = 0,
.buffer_max = ~0,
.shared_max = ~0,
.shared_atomic_max = ~0,
.shared_max = UINT16_MAX,
.shared_atomic_max = UINT16_MAX,
.allow_offset_wrap_cb = ac_nir_allow_offset_wrap_cb,
};
NIR_PASS(_, nir, nir_opt_offsets, &offset_options);
}