Commit graph

58428 commits

Author SHA1 Message Date
Lionel Landwerlin
fd7debc8bb intel/fs: make alpha_to_coverage a tristate
That way in some cases we can do this dynamically.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:18 +00:00
Jason Ekstrand
949b42c4dc intel/compiler: Convert wm_prog_key::multisample_fbo to a tri-state
This allows us to communicate to the back-end that we don't actually
know if the framebuffer is multisampled or not.  No drivers set anything
but ALWAYS/NEVER and we still have a few ALWAYS/NEVER assumptions but
those should be asserted.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:18 +00:00
Jason Ekstrand
5644011f06 intel/compiler: Convert wm_prog_key::persample_interp to a tri-state
This allows for the possibility that we may not know at compile time if
sample shading is enabled through the API.  While we're here, also
document exactly what this bit means so we don't confuse ourselves.

v2: Fixup coarse pixel values (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:18 +00:00
Jason Ekstrand
d8dfd153c5 intel/fs: Make per-sample and coarse dispatch tri-state
Whenever one of them is BRW_SOMETIMES, we depend on dynamic flag pushed
in as a push constant.  In this case, we have to often have to do the
calculation both ways and SEL the result.  It's a bit more code but
decouples MSAA from the shader key.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:18 +00:00
Jason Ekstrand
43ca7f4178 intel/compiler: Convert brw_wm_aa_enable to brw_sometimes
There are other cases where we want a tri-state logic like this.  May as
well have one enum for all the cases.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21094>
2023-02-06 09:12:17 +00:00
Marek Olšák
71a6b53192 amd: don't hardcode real VGPR allocation granularity on gfx10.3 and gfx11
That's how it really works.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:58 -05:00
Marek Olšák
e673bb4ae4 amd,util: fix how lod bias is converted to fixed-point
according to internal docs

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Marek Olšák
70d228188a radeonsi: clean up si_set_mutable_tex_desc_fields
- sink code into existing branches
- remove unnecessary clearing of fields
- no functional change

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Marek Olšák
97f30fc65f radeonsi/gfx11: don't add alpha to mrt0 format for A2C if exporting via mrtz
If alpha-to-coverage is exported via mrtz, don't upgrade the mrt0 format
to one with an alpha channel.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Marek Olšák
0f81224e70 radeonsi/gfx11: don't add mrt0 export for alpha-to-coverage if mrtz is present
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20967>
2023-02-05 23:23:45 -05:00
Mike Blumenkrantz
b481e3ae57 zink: conditionally enable PIPE_CAP_NULL_TEXTURES
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21072>
2023-02-05 13:32:02 +00:00
Mike Blumenkrantz
8b000ebbb5 radeonsi: set PIPE_CAP_NULL_TEXTURES
fixes #8163

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21072>
2023-02-05 13:32:02 +00:00
Mike Blumenkrantz
2127287d4d gallium: add PIPE_CAP_NULL_TEXTURES
this allows drivers to indicate that they support sampling from null
textures instead of using fallback textures

for now, this is only used for depth-based fallback textures

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21072>
2023-02-05 13:32:02 +00:00
Luc Ma
abe6d750e5 xlib: fix glXDestroyContext in Gallium frontends
when glx is built with -Dglx=xlib, the mishandle in
glXDestroyContext causes glmark2 to exit unexpectedly.

Error: Glmark2 needs OpenGL(ES) version >= 2.0 to run (but version string is: '(null)')!
Error: Failed to add vertex shader from file None:
Error:   Failed to create the new program
[build] <default>: Set up failed

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3985

Signed-off-by: Luc Ma <luc@sietium.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21067>
2023-02-04 22:25:09 +00:00
SoroushIMG
8f928a95e1 zink: fix cap check for arb sparse texture2
arb_sparse_texture2 also enables multisampled sparse textures.
bring back the check for msaa support.

fixes #8229

Fixes: 4f8ba2b9aa ("zink: fix sparse residency query and minLOD feature checks")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21121>
2023-02-04 18:05:48 +00:00
Alyssa Rosenzweig
57e0dbe55b asahi: Implement load_ssbo_address/get_ssbo_size
More uniforms that get pushed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
78c9344a4d asahi: Add compute batches
Add a specialized agx_batch for compute commands (queued to the CDM instead of
the VDM for graphics). This uses a sentinel value for the width.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
f54739396c asahi: Bump PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
Seems arbitrary.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
580ed13779 asahi: Stub out MSAA for dEQP
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
5e7babfa1b asahi: Advertise seamless cube maps
These are already wired up.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
32cbcbcb50 asahi: Fake more caps for dEQP-GLES31
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
f4b553d55a asahi: Add hooks for SSBO and images
Copy paste from Panfrost. This should be close to what we need for Asahi, and
this lets us run dEQP-GLES31 without crashing immediately.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
c1a6465644 asahi: Don't leak shader NIR
create_shader_state passes ownership of the NIR to the driver, so we need to
free it when we destroy the shader CSO later. Use ralloc to manage this in a
uniform way between graphics and compute. Strategy from Panfrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
227d4f6d75 asahi: Add compute kernel scaffolding
This adds the basic scaffolding for compute kernels. There's a bit of churn to
make sure we don't need to hang onto the kernel NIR, since it's never used for
anything else except looking up the shader stage.

The compute kernels aren't actually wired up here, but they do get compiled.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
60121e3a42 asahi: Fix delete_vs_state implementation
The generic free won't delete the shader variants, leaking them all!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
2023-02-04 17:10:15 +00:00
Alyssa Rosenzweig
e765ec21ec asahi: Implement custom border colours
Implement custom border colours, as required by OpenGL's CLAMP_TO_BORDER and
Vulkan with customBorderColor. This uses an extended sampler descriptor, which
has space for the custom border values. The trouble is that the border must be
packed into an internal interchange format that depends on the original format
in a complex way. That said, we're not solving NP-complete problems here, and it
passes the tests (dEQP-GLES31.functional.texture.border_clamp.* and piglit
texwrap).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20570>
2023-02-04 10:37:02 -05:00
Alyssa Rosenzweig
10eaa4a2ec asahi: Add XML for custom border colours
These use extended sampler descriptors.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20570>
2023-02-04 10:32:24 -05:00
Alyssa Rosenzweig
5678fbe010 asahi: Merge fragment control XML
Same struct specified twice and merged in the hw.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21081>
2023-02-04 07:58:42 +00:00
Alyssa Rosenzweig
50e61e251b asahi: Remove redundant tri merge disable bit
Cargoculted from Metal.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21081>
2023-02-04 07:58:42 +00:00
Alyssa Rosenzweig
6ee38e2635 asahi: DRY dirty tracking conditions
Ella did this in agxv and it made a lot more sense than the copypasta I did.
Should get copypropped to similar code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21081>
2023-02-04 07:58:42 +00:00
Alyssa Rosenzweig
98b2657b9e asahi: Implement nontrivial rasterizer discard
For vertex shaders with side effects, as seen with transform feedback.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21081>
2023-02-04 07:58:42 +00:00
Alyssa Rosenzweig
64ae63c41f asahi: Prefer blit-based texture transfer
This speeds up glReadPixels. Instead of reading from the write-combined
framebuffer and converting colours on the CPU, this blits on the GPU to a
writeback staging resource with the colour conversion for free, and memcpies
from the writeback staging resource on the CPU.

In general, due to textures being write combined and tiled/compressed by default
by staging resources being linear writeback, blit-based texture transfer should
win out (you were going to blit anyway), particularly when format conversion is
involved

33% reduction in wall clock time for grim at 4K. No change in deqp-gles2
runtime.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21063>
2023-02-04 07:45:12 +00:00
Alyssa Rosenzweig
0a5c3764c7 asahi: Make STAGING resources linear
As intended by the flag.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21063>
2023-02-04 07:45:12 +00:00
Alyssa Rosenzweig
e7b97899ac asahi: Use writeback when it looks beneficial
When playing the My Little Pony theme song at 1080p on T8103, with mpv's GPU
compositing but software decoding, CPU usage drops from 200% to 50% due to
proper caching of the staging resource.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21063>
2023-02-04 07:45:12 +00:00
Asahi Lina
a88aa3e835 asahi: Refuse to transfer out-of-bounds mip levels
Fixes ail asserts on a pile of dEQP3 tests.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21063>
2023-02-04 07:45:12 +00:00
Alyssa Rosenzweig
231561d53a asahi: Correct alignment for USC Uniform packets
We only need 4 byte alignment, not 8 bytes. This isn't a big difference in
practice, but it probably reduces padding in some cases. More importantly, it
corrects our XML to match what the hardware actually does, which is great.
(There is exactly enough room for a 40-bit address with 4 byte alignment.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21118>
2023-02-04 07:19:29 +00:00
Alyssa Rosenzweig
e4cb64c0e2 asahi/nir_lower_sysvals: Split large ranges
It is our responsibility to ensure uniform ranges don't exceed 64 uniforms.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21118>
2023-02-04 07:19:29 +00:00
Alyssa Rosenzweig
79a7c6e3bd asahi: Set layout->mipmapped_z for 3D textures
There's a corner case where 3D textures have extra padding compared to 2D
arrays. We need to communicate that to ail.

Fixes
dEQP-GLES3.functional.texture.specification.texstorage3d.size.3d_32x16x64_4_levels.
That test now uses the same layout as Metal.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21114>
2023-02-04 07:04:49 +00:00
Ian Romanick
ea413e826b nir: Eliminate nir_op_f2b
Builds on the work of !15121.  This gets to delete even more code
because many drivers shared a lot of code for i2b and f2b.

No shader-db or fossil-db changes on any Intel platform.

v2: Rebase on 1a35acd8d9.

v3: Update a comment in nir_opcodes_c.py. Suggested by Konstantin.

v4: Another rebase. Remove f2b stuff from Midgard.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20509>
2023-02-03 22:39:57 +00:00
Ian Romanick
b265020b82 nir/builder: Eliminate nir_f2b helper (and use of nir_f2b32 helper)
There were only two users. Replace each with nir_fneu instead.

This is now a squash of what was two separate commits.
nir_lower_pstipple_block is called after nir_lower_bool_to_int32, so
nir_fneu32 has to be used here or there will be regresssions in stipple
tests on llvmpipe.

v2: Rebase on !20869.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Suggested-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20509>
2023-02-03 22:39:57 +00:00
Mike Blumenkrantz
7b0d000342 zink: add back VK_DESCRIPTOR_BINDING_PARTIALLY_BOUND_BIT for bindless
this was accidentally lost in refactor

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21100>
2023-02-03 21:59:07 +00:00
Mike Blumenkrantz
e67bdf47d4 zink: handle missing line rasterization modes with ds3
it's annoying to validate this at runtime since it has to happen during draw,
but storing the "usable" ds3 mode separately from the pipeline state should
be a reasonable enough compromise for perf here...hopefully

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21100>
2023-02-03 21:59:07 +00:00
Mike Blumenkrantz
813bb9e442 zink: cache and reuse dummy inputattachment for fbfetch
apparently an actual null descriptor is illegal here, and it's wasted cpu
anyway, so just cache the dummy surface on init and use that data when
fbfetch isn't active but the layout requires it

Fixes: 7ab5c5d36d ("zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21100>
2023-02-03 21:59:07 +00:00
Mike Blumenkrantz
abf63b7c68 zink: fix more cases of heap/memtype suballocator mismatch
suballocation must happen based on the memtype, so also add some asserts to
ensure the slab bos are always what the caller expects

Fixes: f6d3a5755f ("zink: zink_heap isn't 1-to-1 with memoryTypeIndex")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21100>
2023-02-03 21:59:07 +00:00
Mike Blumenkrantz
e1e4ddcf10 zink: free descriptor buffer maps on batch state destroy
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21100>
2023-02-03 21:59:07 +00:00
SoroushIMG
4f8ba2b9aa zink: fix sparse residency query and minLOD feature checks
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21013>
2023-02-03 20:05:23 +00:00
Emma Anholt
de5b67ef2c ci/llvmpipe: Drop skip of InteractionFunctionCalls2.
This one is down to <5 seconds here these days.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21084>
2023-02-03 19:01:59 +00:00
Emma Anholt
2eb07304e3 ci/swrast: Drop skips for tests whose perf had been fixed.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21084>
2023-02-03 19:01:59 +00:00
Emma Anholt
907b0a01b7 gallivm: Do the same codegen improvement for constant-index array loads.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21084>
2023-02-03 19:01:59 +00:00
Emma Anholt
cf47154300 gallivm: Fix codegen performance for constant-index register array stores.
Instead of generating num_components*simdwidth scattered stores, if
there's no indirect then we can just look up the pointer to the
base_offset and do a simd store there.

dEQP-VK.subgroups.ballot_broadcast.compute.subgroupbroadcast_i64vec4 goes
from 30s to ~2s.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21084>
2023-02-03 19:01:59 +00:00