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asahi: Add hooks for SSBO and images
Copy paste from Panfrost. This should be close to what we need for Asahi, and this lets us run dEQP-GLES31 without crashing immediately. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21062>
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3 changed files with 81 additions and 1 deletions
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@ -1443,6 +1443,12 @@ agx_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader,
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!(shader == PIPE_SHADER_COMPUTE && is_deqp))
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return 0;
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/* Don't allow side effects with vertex processing. The APIs don't require it
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* and it may be problematic on our hardware.
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*/
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bool allow_side_effects = (shader != PIPE_SHADER_VERTEX);
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/* this is probably not totally correct.. but it's a start: */
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switch (param) {
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case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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@ -1507,10 +1513,14 @@ agx_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader,
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return PIPE_SHADER_IR_NIR;
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case PIPE_SHADER_CAP_SUPPORTED_IRS:
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return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_NIR_SERIALIZED);
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return (1 << PIPE_SHADER_IR_NIR);
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case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
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return (is_deqp && allow_side_effects) ? 16 : 0;
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case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
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return (is_deqp && allow_side_effects) ? PIPE_MAX_SHADER_IMAGES : 0;
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
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case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
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return 0;
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@ -106,6 +106,68 @@ agx_set_stream_output_targets(struct pipe_context *pctx, unsigned num_targets,
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so->num_targets = num_targets;
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}
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static void
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agx_set_shader_images(
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struct pipe_context *pctx,
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enum pipe_shader_type shader,
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unsigned start_slot, unsigned count, unsigned unbind_num_trailing_slots,
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const struct pipe_image_view *iviews)
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{
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struct agx_context *ctx = agx_context(pctx);
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ctx->stage[shader].dirty = ~0;
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/* Unbind start_slot...start_slot+count */
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if (!iviews) {
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for (int i = start_slot; i < start_slot + count + unbind_num_trailing_slots; i++) {
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pipe_resource_reference(&ctx->stage[shader].images[i].resource, NULL);
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}
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ctx->stage[shader].image_mask &= ~(((1ull << count) - 1) << start_slot);
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return;
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}
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/* Bind start_slot...start_slot+count */
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for (int i = 0; i < count; i++) {
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const struct pipe_image_view *image = &iviews[i];
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if (image->resource)
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ctx->stage[shader].image_mask |= BITFIELD_BIT(start_slot + i);
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else
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ctx->stage[shader].image_mask &= ~BITFIELD_BIT(start_slot + i);
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if (!image->resource) {
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util_copy_image_view(&ctx->stage[shader].images[start_slot+i], NULL);
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continue;
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}
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/* FIXME: Decompress here once we have texture compression */
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util_copy_image_view(&ctx->stage[shader].images[start_slot+i], image);
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}
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/* Unbind start_slot+count...start_slot+count+unbind_num_trailing_slots */
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for (int i = 0; i < unbind_num_trailing_slots; i++) {
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ctx->stage[shader].image_mask &= ~BITFIELD_BIT(start_slot + count + i);
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util_copy_image_view(&ctx->stage[shader].images[start_slot+count+i], NULL);
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}
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}
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static void
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agx_set_shader_buffers(
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struct pipe_context *pctx,
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enum pipe_shader_type shader,
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unsigned start, unsigned count,
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const struct pipe_shader_buffer *buffers,
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unsigned writable_bitmask)
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{
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struct agx_context *ctx = agx_context(pctx);
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util_set_shader_buffers_mask(ctx->stage[shader].ssbo,
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&ctx->stage[shader].ssbo_mask,
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buffers, start, count);
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ctx->stage[shader].dirty = ~0;
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}
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static void
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agx_set_blend_color(struct pipe_context *pctx,
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const struct pipe_blend_color *state)
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@ -2517,6 +2579,8 @@ agx_init_state_functions(struct pipe_context *ctx)
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ctx->set_blend_color = agx_set_blend_color;
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ctx->set_clip_state = agx_set_clip_state;
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ctx->set_constant_buffer = agx_set_constant_buffer;
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ctx->set_shader_buffers = agx_set_shader_buffers;
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ctx->set_shader_images = agx_set_shader_images;
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ctx->set_sampler_views = agx_set_sampler_views;
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ctx->set_framebuffer_state = agx_set_framebuffer_state;
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ctx->set_polygon_stipple = agx_set_polygon_stipple;
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@ -132,6 +132,12 @@ struct agx_stage {
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struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
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uint32_t cb_mask;
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struct pipe_shader_buffer ssbo[PIPE_MAX_SHADER_BUFFERS];
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uint32_t ssbo_mask;
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struct pipe_image_view images[PIPE_MAX_SHADER_IMAGES];
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uint32_t image_mask;
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/* Need full CSOs for u_blitter */
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struct agx_sampler_state *samplers[PIPE_MAX_SAMPLERS];
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struct agx_sampler_view *textures[PIPE_MAX_SHADER_SAMPLER_VIEWS];
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