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Author SHA1 Message Date
Brian
0ae7404835 Merge branch 'master' of git+ssh://brianp@git.freedesktop.org/git/mesa/mesa 2006-12-14 15:20:15 -07:00
Brian
5cc1292508 Replace __extension__ with LONGSTRING. 2006-12-14 14:27:05 -07:00
Brian
b56a5261fe Check in a long-misplaced spec update. 2006-12-14 09:38:06 -07:00
Michel Dänzer
fde908444a Fix copy-and-paste-o of my e-mail address. 2006-12-14 12:57:59 +01:00
Michel Dänzer
e0c9361a7c Avoid failing assertion in intel_miptree_set_image_offset() with cube maps. 
Cube maps still aren't working quite correctly though.
 2006-12-14 12:47:44 +01:00
Michel Dänzer
81855f22cd Fix some corner cases in i945_miptree_layout_2d(). 
Based on a patch from Keith Whitwell, with some further fixes.
 2006-12-14 12:42:51 +01:00
Michel Dänzer
3416ef303a Share code to lay out >= 945 style 2D mipmaps between i915tex and i965 drivers. 
Use the i965 version as it has some fixes over the i915tex version.
 2006-12-14 12:39:38 +01:00
Michel Dänzer
cc1afed671 intel_finalize_mipmap_tree: Add more conditions for rebuilding mipmap trees. 
These are taken from the i965 driver and fix corruption of some mipmap levels
under some circumsances with 945 chipsets at least.

Also flush the batchbuffer after copying data between trees, or some apps fail
an assertion elsewhere.
 2006-12-14 11:04:10 +01:00
Michel Dänzer
5f8a3e586f intel_batchbuffer_flush: Don't assert cliprects when lock is not held. 
This is a legitimate situation when copying texture data between mipmap trees.
 2006-12-14 11:01:39 +01:00
Michel Dänzer
4cb09df015 intelTexSubimage: Fix last parameter for intel_miptree_image_map(). 2006-12-14 11:01:38 +01:00
Michel Dänzer
9c09259b8b _mesa_swizzle_ubyte_image: Only use single swizzle_copy call when strides match. 
This fixes texture data corruption with glTexSubimage (and probably glTexImage
under some circumstances) with the texstore swizzle path.
 2006-12-14 11:01:38 +01:00
Michel Dänzer
78a6e05439 mipmap_limits: Fix display of current texture filtering mode. 2006-12-14 11:01:38 +01:00
Ben Skeggs
99878298da Improve SwapBuffers a bit. 2006-12-14 04:34:38 +00:00
Ben Skeggs
c95557f48b 0x4497 doesn't have NV30_TCL_PRIMITIVE_3D_NORMALIZE_ENABLE 2006-12-14 04:12:05 +00:00
Ben Skeggs
15c7e8896b Some more voodoo to get 3D going with a minimal initial context. 2006-12-14 03:24:57 +00:00
Roland Scheidegger
2956a0c8a8 submit vertex weights to make World of Warcraft maybe happy (bug 8250) 
submit the vertex weights to hw, which will enable broken vertex programs
errorneously using them to work. Note however that this will only work
if glWeight is used, there is no code in mesa at all to deal with weight
vertex array (glWeightPointerARB).
 2006-12-14 00:34:44 +01:00
Brian
8dcfcad7a2 Move all the code for computing ctx->_TriangleCaps into state.c. 
ctx->_TriangleCaps should probably go away altogether someday...
 2006-12-13 15:31:14 -07:00
Nian Wu
77b862a849 Merge git://proxy01.pd.intel.com:9419/git/mesa/mesa into crestline 2006-12-13 13:49:00 -08:00
Zou Nan hai
ed7fbad206 Fix bug #93, i965 driver not thread safe. 
I am not confident of it is 100% thread safe now.
  bufmgr_fake.c need a total rewrite later
(cherry picked from 606632ca27558ee1335be2f4a5906f2baa240a6a commit)
 2006-12-13 13:29:37 -08:00
Zou Nan hai
4720cd0050 fix bug #99. 
prim_count overflow when there is more than 1 cliprect
(cherry picked from 84b958d66fe7d3fe03ed12b493e3f3197f656531 commit)
 2006-12-13 13:29:20 -08:00
Michel Dänzer
c9795c6ca2 minstall: Pass correct destination file path to $RM regardless of source path. 
(cherry picked from 26626c0052 commit)
 2006-12-13 13:26:09 -08:00
Michel Dänzer
bce82efe1f minstall: Always remove destination file before (re-)creating it. 
This avoids issues with overwriting files that are being used.
(cherry picked from d71a5647a3 commit)
 2006-12-13 13:25:42 -08:00
Zou Nan hai
aeda4c589a ARB_occlusion_query support 2006-12-13 13:25:12 -08:00
Zou Nan hai
696fe3f52e if (tex width < 4), mipmap calculation will be out of range 2006-12-13 13:24:35 -08:00
Brian
6c305c0831 Remove the xdemo.c program from PROGS since it doesn't work with GLX/DRI. 2006-12-13 08:57:06 -07:00
Brian
73eee2402e Use XDisplayName() when reporting errors (bug 8079). 2006-12-13 08:30:26 -07:00
Zou Nan hai
c34d026eb0 Fix bug #93 2006-12-13 15:27:17 +08:00
George Sapountzis
5b35132b41 Bug 7260: mach64 texture memory mng cleanup 
mach64 uses its own set of texture memory management routines which are buggy,
running a second DRI client kills the first one. This patch ports mach64 code
to the stock dri texture managment code.
 2006-12-12 12:51:37 +02:00
George Sapountzis
c180678d92 Bug 7861: mach64 with render acceleration should restore texture state 
RENDER acceleration uses texturing, thus when RENDER acceleration is enabled,
the mach64 DRI driver should restore texture state when acquiring the DRI lock.
 2006-12-12 12:51:33 +02:00
George Sapountzis
eed1a6de4b Bug 7790: Polygons incorrectly clipped by mach64 driver 
un-break strict-aliasing rules
 2006-12-12 12:51:27 +02:00
Zou Nan hai
de90bbd0b7 fix for bug #99 2006-12-12 15:00:27 +08:00
Eric Anholt
d214138910 Merge branch 'origin' into crestline 2006-12-11 10:50:25 -08:00
Michel Dänzer
26626c0052 minstall: Pass correct destination file path to $RM regardless of source path. 2006-12-11 17:45:06 +01:00
Michel Dänzer
d71a5647a3 minstall: Always remove destination file before (re-)creating it. 
This avoids issues with overwriting files that are being used.
 2006-12-11 17:36:35 +01:00
Wang Zhenyu
89433fef0d ARB_occlusion_query support 2006-12-11 00:01:56 -08:00
Wang Zhenyu
b4d9c0048f if (tex width < 4), mipmap calculation will be out of range 2006-12-11 00:00:51 -08:00
Eric Anholt
9a94dae4c2 Avoid branch instructions while in single program flow mode. 
There is an errata for Broadwater that threads don't have the instruction/loop
mask stacks initialized on thread spawn.  In single program flow mode, those
stacks are not writable, so we can't initialize them.  However, they do get
read during ELSE and ENDIF instructions.  So, instead, replace branch
instructions in single program flow mode with predicated jumps (ADD to the ip
register), avoiding use of the more complicated branch instructions that may
fail.  This is also a minor optimization as no ENDIF equivalent is necessary.
 2006-12-10 12:24:51 -08:00
Eric Anholt
183abbcd6b Connect INTEL_DEBUG=sync up to cmd/batch ioctls. 2006-12-10 12:24:46 -08:00
Wang Zhenyu
0536268267 adding pci id of Crestline 2006-12-10 12:24:40 -08:00
Eric Anholt
d7b24fec24 i965: Fix a crash with wine by not allocating >1MB on the stack. 2006-12-09 22:35:07 -08:00
Patrice Mandin
aadcf1a9ff Update spot light params also for nv20 and nv30 2006-12-08 18:56:51 +00:00
Patrice Mandin
5c80270b91 grr, always check twice before commit 2006-12-08 16:40:34 +00:00
Patrice Mandin
65c54a685a Resend spot light parameters when part of it changes 2006-12-08 16:39:12 +00:00
Ben Skeggs
c04c74bc5d Skeletal extension handling across chipsets. 2006-12-08 14:12:47 +00:00
Ben Skeggs
fe91d00e33 NV_44 uses nv30InitStateFuncs too 2006-12-08 12:36:26 +00:00
Ben Skeggs
046ece3a2d state cache is automagically flushed on a normal BEGIN_RING_SIZE 2006-12-08 11:51:50 +00:00
Ben Skeggs
e62b2f9c2e Implement a simple nv30Clear, and make sure we get a nouveau_renderbuffer 
for the depth buffer and not a Mesa renderbuffer adaptor
 2006-12-08 11:45:39 +00:00
Xiang, Haihao
f79360858d fix bug#9237 2006-12-08 17:05:14 +08:00
Xiang, Haihao
5449f5a975 fix bug#9045 2006-12-08 17:00:59 +08:00
Ben Skeggs
bda66ac426 oops, typo 2006-12-08 07:27:39 +00:00