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Author SHA1 Message Date
Chad Versace
f9d4d09549 isl: Fix isl_surf_get_image_offset_sa for gen4_3d layout 
Bug found by unit test
test_bdw_3d_r8g8b8a8_unorm_256x256x256_levels09_tiley0.
 2016-01-22 09:45:22 -08:00
Chad Versace
891ed5ca8c isl/tests: Add test for bdw 3d surface 
test_bdw_3d_r8g8b8a8_unorm_256x256x256_levels09_tiley0

Currently fails.
 2016-01-22 09:45:21 -08:00
Chad Versace
fbc87ce4be isl/tests: Remove copy-paste assertion 2016-01-22 07:18:04 -08:00
Chad Versace
63d999b762 isl/tests: Fix build 
isl_device_init() acquired a new param for bit6 swizzling.
 2016-01-22 07:17:57 -08:00
Francisco Jerez
2e54381622 anv/batch_chain: Fix patching up of block pool relocations on Gen8+. 
Relocations are 64 bits on Gen8+.  Most CTS tests that send
non-trivial work to the GPU would fail when run from a single deqp-vk
invocation because they were effectively relying on reloc presumed
offsets to be wrong so the kernel would come and apply relocations
correctly.
 2016-01-21 16:30:44 -08:00
Jason Ekstrand
13aaf90048 nir/spirv: Ignore cull distance 2016-01-21 16:20:39 -08:00
Jason Ekstrand
13858a1c1a nir/lower_system_values: Use the correct invication id for CS 2016-01-21 16:20:39 -08:00
Jason Ekstrand
d8c0e0805b nir/spirv: Properly assign locations to split structures 2016-01-21 16:20:39 -08:00
Jason Ekstrand
514507825c nir/spirv: Improve handling of variable loads and copies 
Before we were asuming that a deref would either be something in a block or
something that we could pass off to NIR directly.  However, it is possible
that someone would choose to load/store/copy a split structure all in one
go.  We need to be able to handle that.
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
7e5e64c8a9 nir/spirv: Make vectors a proper array time with an array_element 
This makes dealing with single-component derefs easier
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
a8af0f536c nir/spirv: Rework access chains a bit to allow for literals 
This makes them much easier to construct because you can also just specify
a literal number and it doesn't have to be a valid SPIR-V id.
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
5d9a6fd526 vtn/variables: Compact local loads/stores into one function 
This is similar to what we did for block loads/stores.
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
b298743d7b nir/spirv: Add an actual variable struct to spirv_to_nir 
This allows us, among other things, to do structure splitting on-the-fly to
more correctly handle input/output structs.
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
2892693d56 nir/spirv: Split variable handling out into its own file 
It's 1300 lines all by itself and it will only grow.
 2016-01-21 16:20:39 -08:00
Jason Ekstrand
1112bf633f nir/spirv: Rework access chains 
Previously, we were creating nir_deref's immediately.  Now, instead, we
have an intermediate vtn_access_chain structure.  While a little more
awkward initially, this will allow us to more easily do structure splitting
on-the-fly.
 2016-01-21 16:18:37 -08:00
Kenneth Graunke
824f776355 nir/spirv: Implement ModfStruct opcode. 2016-01-21 14:57:47 -08:00
Kenneth Graunke
f89d5cb807 nir/spirv: Delete stray fmod remnants. 
Jason left these stray code fragments in
22804de110.
 2016-01-21 14:54:20 -08:00
Kristian Høgsberg Kristensen
ac60e98a58 vk: Do render cache flush for GEN8+ 
This is needed for SKL as well.
 2016-01-21 14:18:52 -08:00
Kristian Høgsberg Kristensen
9eab8fc683 vk: Emit surface state base address before renderpass 
If we're continuing a render pass, make sure we don't emit the depth and
stencil buffer addresses before we set the state base addresses.

Fixes crucible func.cmd-buffer.small-secondaries
 2016-01-21 14:18:52 -08:00
Kristian Høgsberg Kristensen
c5490d0277 vk: Fix indirect push constants 
This currently sets the base and size of all push constants to the
entire push constant block. The idea is that we'll use the base and size
to eventually optimize the amount we actually push, but for now we don't
do that.
 2016-01-21 11:10:11 -08:00
Kristian Høgsberg Kristensen
83c86e09a8 Merge remote-tracking branch 'jekstrand/wip/i965-uniforms' into vulkan 2016-01-21 11:09:58 -08:00
Jordan Justen
b1a7a27d60 nir/spirv: Handle compute shared atomics 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
a7e5b683ca nir/spirv: Support workgroup (shared) variable translation 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
bc035db3c8 anv/gen8: Set SLM size in interface descriptor 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
819cb69434 anv/gen8+9: Invalidate color calc state when switching to the GPGPU pipeline 
Port 044acb9256 to anv.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
19830031cb anv/gen8: Enable SLM in L3 cache control register 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
97b09a9268 anv/pipeline: Set size of shared variables in prog_data 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
86daceb7f2 i965/nir: Lower nir compute shader shared variables 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
ca55817fa1 nir: Lower shared var atomics during nir_lower_io 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
36157cd5ea nir: Add support for lowering load/stores of shared variables 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
7a9a54b5c8 nir: Add atomic operations on variables 
This allows us to first generate atomic operations for shared
variables using these opcodes, and then later we can lower those to
the shared atomics intrinsics with nir_lower_io.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
10db985fa0 nir: Add compute shader shared variable storage class 
Previously we were receiving shared variable accesses via a lowered
intrinsic function from glsl. This change allows us to send in
variables instead. For example, when converting from SPIR-V.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
65a5407931 nir/print: Add space after shader_storage var mode 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Jordan Justen
9f4a72c9e3 i965/fs/nir: Move shared variable load/store to nir_emit_cs_intrinsic 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
 2016-01-21 00:31:29 -08:00
Chad Versace
5ce5a7d021 anv/image: Stop including gen8_pack.h in common file 2016-01-20 15:42:17 -08:00
Chad Versace
8ab527de03 isl: Add a README 
Most of the file-level comment in isl.h is moved to the README.
 2016-01-20 15:24:40 -08:00
Kristian Høgsberg Kristensen
7b7a7c2bfc vk: Make maxSamplerAllocationCount more reasonable 
We can't allocate 4 billion samplers. Let's go with 64k.
 2016-01-20 14:36:52 -08:00
Kristian Høgsberg Kristensen
8ef002dd7a vk/tests: Add stub for anv_gem_get_bit6_swizzle() 2016-01-20 13:47:40 -08:00
Kristian Høgsberg Kristensen
420e8664cb vk/tests: Add isl include path 2016-01-20 13:47:40 -08:00
Kenneth Graunke
b76e4458f9 nir/spirv/glsl450: Use fabs not iabs in ldexp. 
This was just wrong.
 2016-01-20 12:18:02 -08:00
Kristian Høgsberg Kristensen
947ebd9c71 isl: Add ish.h to libsil_la_SOURCES 2016-01-20 12:03:46 -08:00
Jason Ekstrand
21b2d87408 nir/spirv/glsl450: Implement FrexpStruct 2016-01-20 11:36:41 -08:00
Jason Ekstrand
c7896d1868 spirv/nir/glsl450: Use vtn_create_ssa_value to create SSA values 2016-01-20 11:36:26 -08:00
Jason Ekstrand
e45748bade anv/device: Default to scalar GS on BDW+ 2016-01-20 11:16:44 -08:00
Jason Ekstrand
34f9a5f301 nir/spirv: Pull texture dimensionality out of the image when available 2016-01-20 11:11:30 -08:00
Jason Ekstrand
59ef7c6507 anv/meta: fix UpdateBuffer in the case where we do multiple updates 2016-01-20 07:56:48 -08:00
Jason Ekstrand
a0516cfbac anv/meta: Fix a finishme 2016-01-20 07:33:41 -08:00
Jason Ekstrand
c7203aa621 nir/spirv: Move OpPhi handling to vtn_cfg.c 
Phi handling is somewhat intrinsically tied to the CFG.  Moving it here
makes it a bit easier to handle that.  In particular, we can now do SSA
repair after we've done the phi node second-pass.  This fixes 6 CTS tests.
 2016-01-19 19:00:00 -08:00
Jason Ekstrand
891564adb9 nir/spirv: Handle OpLine and OpNoLine in foreach_instruction 
This way we don't have to explicitly handle them everywhere.
 2016-01-19 19:00:00 -08:00
Kenneth Graunke
e79f8a4926 nir: Lower ldexp to arithmetic. 
This is a port of Matt's GLSL IR lowering pass to NIR.  It's required
because we translate SPIR-V directly to NIR, bypassing GLSL IR.

I haven't introduced a lower_ldexp flag, as I believe all current NIR
consumers would set the flag.  i965 wants this, vc4 doesn't implement
this feature, and st_glsl_to_tgsi currently lowers ldexp
unconditionally anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
 2016-01-19 18:10:30 -08:00