fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-30 16:30:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

vk: Do render cache flush for GEN8+

Browse source 
This is needed for SKL as well.
This commit is contained in:
Kristian Høgsberg Kristensen 2016-01-21 14:14:01 -08:00
parent 9eab8fc683
commit ac60e98a58
1 changed files with 2 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/vulkan/genX_cmd_buffer.c
View file

@ -48,7 +48,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
scratch_bo = &device->scratch_block_pool.bo;
/* XXX: Do we need this on more than just BDW? */
#if (ANV_GEN == 8)
#if (ANV_GEN >= 8)
/* Emit a render target cache flush.
*
* This isn't documented anywhere in the PRM. However, it seems to be
@ -56,7 +56,7 @@ genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer)
* this, we get GPU hangs when using multi-level command buffers which
* clear depth, reset state base address, and then go render stuff.
*/
anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL),
.RenderTargetCacheFlushEnable = true);
#endif