Commit graph

5653 commits

Author SHA1 Message Date
Jason Ekstrand
f727e98d22 nir/lower_io: Add data OOB asserts to write_constant
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7565>
2020-11-18 04:05:37 +00:00
Eric Anholt
51f2b11b04 nir: Add a size_align helper function for aligning elements to 16 bytes.
This is useful for freedreno's intrinsic opt_large_constant lowering,
where we want arrays and struct elements aligned to 16 to avoid generating
lots of extra instructions to extract from the right component.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5810>
2020-11-16 13:54:22 -08:00
Dave Airlie
671c850310 spirv/cl: add enqueued workgroup size.
Unless the non uniform work group extension is supported, this
just aliases workgroupsize, so just do that for now.

Fixes:
CL CTS basic enqueued_local_size

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7642>
2020-11-17 05:15:10 +10:00
Lionel Landwerlin
3f91f4e2ab nir: don't consider txf_ms_mcs a query instruction
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6172>
2020-11-16 12:13:53 +00:00
Tony Wasserka
4e87e7863f glsl: Fix -Wshadow warning
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7552>
2020-11-16 08:49:18 +00:00
Alejandro Piñeiro
5169dfd1fd nir/lower_tex: clarify nir_lower_tex_options indexing
This doesn't matter too much on OpenGL as texture id and sampler id
are the same, but become relevant if using the lowering for Vulkan.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7545>
2020-11-14 15:59:02 +00:00
Rhys Perry
bf5cea7232 nir: allow reordering of loads from read-only modes
fossil-db (Navi):
Totals from 710 (0.51% of 138917) affected shaders:
SGPRs: 45007 -> 44791 (-0.48%)
VGPRs: 36116 -> 36284 (+0.47%); split: -0.03%, +0.50%
CodeSize: 3811540 -> 3795332 (-0.43%); split: -0.43%, +0.00%
MaxWaves: 8018 -> 8005 (-0.16%)
Instrs: 758383 -> 755084 (-0.44%); split: -0.44%, +0.01%
Cycles: 5786240 -> 5758848 (-0.47%); split: -0.48%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7600>
2020-11-13 17:25:01 +00:00
Rhys Perry
eb7507681f nir: add nir_var_mem_ubo to nir_var_read_only_modes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7600>
2020-11-13 17:25:01 +00:00
Daniel Schürmann
0ef5f3552f nir: add strength reduction pattern for imod/irem with pow2 divisor.
Affected games are Detroit : Become Human and Doom : Eternal.

Totals from 6262 (4.54% of 138013) affected shaders (RAVEN):
SGPRs: 678472 -> 678640 (+0.02%)
VGPRs: 498288 -> 498360 (+0.01%)
CodeSize: 67064196 -> 65926000 (-1.70%)
MaxWaves: 19390 -> 19382 (-0.04%)
Instrs: 13175372 -> 12932517 (-1.84%)
Cycles: 1444043256 -> 1443022576 (-0.07%); split: -0.08%, +0.01%
VMEM: 929560 -> 908726 (-2.24%); split: +0.39%, -2.63%
SMEM: 406207 -> 400062 (-1.51%); split: +0.46%, -1.97%
VClause: 215168 -> 215031 (-0.06%)
SClause: 443312 -> 442324 (-0.22%); split: -0.25%, +0.03%
Copies: 1350793 -> 1344326 (-0.48%); split: -0.52%, +0.04%
Branches: 506432 -> 506370 (-0.01%); split: -0.02%, +0.01%
PreSGPRs: 619652 -> 619619 (-0.01%)
PreVGPRs: 473212 -> 473168 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/175>
2020-11-13 15:59:03 +01:00
Marek Olšák
cb20d58f45 nir: optimize nir_lower_discard_to_demote to lower discard/demote both ways
This is smarter and also lowers demote to discard if helper invocations are
not needed.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
2020-11-12 21:02:05 +00:00
Marek Olšák
d5039f99b4 nir: gather shader_info::needs_all_helper_invocations
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
2020-11-12 21:02:05 +00:00
Marek Olšák
baa5807e36 nir: rename needs_helper_invocations to needs_quad_helper_invocations
This indicates that only quad operations use helper invocations.
Also handle quad_swizzle_amd.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
2020-11-12 21:02:05 +00:00
Marek Olšák
96c12b7dc2 nir: optionally shuffle local invocation IDs for compute quad derivatives
Used by radeonsi. local_invocation_index is lowered only when quad
derivatives are enabled.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7586>
2020-11-12 21:02:05 +00:00
Marcin Ślusarz
6e6dab4799 nir: handle float atomics in copy propagation pass
Without this patch, copy propagation pass can optimize out
buffer loads out of compare & swap loop, which then leads
to infinite loop.

Triggered by a change to atomicCompSwap float test in piglit.

Fixes: 8424cd8fbd ("nir: Account for atomics in copy propagation.")
Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7538>
2020-11-12 19:20:50 +00:00
Rob Clark
f6359d2dc3 nir: Fix nir_validate fail after nir_lower_tex
It is UB to initialize unions on the stack and rely on bits not covered
by the initialized union member to be zero.  Lets just simplify it and
move the entire nir_const_value off the stack.

While we're in there, sprinkle around some const.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3778
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7579>
2020-11-12 17:12:17 +00:00
Vinson Lee
c432d4814a glsl: Fix typos in comments.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7415>
2020-11-11 19:22:08 +00:00
Vinson Lee
e7aa3cf828 glsl: Initialize ir_variable member field data.is_xfb.
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member field data.is_xfb is not
initialized in this constructor nor in any functions that it calls.

Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7414>
2020-11-11 18:59:43 +00:00
Eric Anholt
eda3e4e055 nir/builder: Add a name format arg to nir_builder_init_simple_shader().
This cleans up a bunch of gross sprintfs and keeps the caller from needing
to remember to ralloc_strdup.  I added a couple of '"%s", name ? name :
""' to radv where I didn't fully trace through whether a non-null name was
being passed in.

I also took the liberty of adding a basic name to a few shaders (pan_blit,
unit tests)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:50:29 -08:00
Eric Anholt
5f992802f5 nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().
This looks a lot more simple now!

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:50:29 -08:00
Eric Anholt
2f372572a1 nir/tests: Simplify the mem_ctx setup in our unit tests.
These all make a simple shader and free it at the end, that can be our
mem_ctx.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:49:58 -08:00
Eric Anholt
5b9c7586f4 nir/builder_tests: Drop unused lin_ctx.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:49:56 -08:00
Eric Anholt
4e9328e3b6 nir_builder: Return a new builder from nir_builder_init_simple_shader().
It's a little inline function, so we can just RAII it for better
ergonomics.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:49:49 -08:00
Samuel Pitoiset
1aa1c1aec2 nir/algebraic: optimize bitfield_select(a, iand(a, b), c)
fossils-db (Vega10):
Totals from 242 (0.17% of 139517) affected shaders:
CodeSize: 853752 -> 852752 (-0.12%)
Instrs: 165944 -> 165694 (-0.15%)
Cycles: 855720 -> 854528 (-0.14%)
VMEM: 83772 -> 83668 (-0.12%); split: +0.13%, -0.25%
SMEM: 12360 -> 12316 (-0.36%)
SClause: 8222 -> 8238 (+0.19%)

Only helps Control.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7531>
2020-11-11 15:28:01 +01:00
Eric Anholt
eba97645c9 nir/validate: Size the set of blocks to avoid rehashing.
We can use num_blocks (if it's been initialized by some pass indexing
blocks) to pre-size our table, which helps on validating shaders with many
blocks which would otherwise reallocate the set several times.

No statistically significant performance difference on softpipe
KHR-GL33.texture_swizzle.functional runtime (n=15).  A previous, similar
variant of this patch cut .3% of instructions in softpipe shader-db ./run
shaders/closed/steam/borderlands-2/35* (an arbitrary set of shaders that
completed in reasonable amount of time) according to callgrind.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7244>
2020-11-10 22:18:31 +00:00
Erik Faye-Lund
b9c61379ab microsoft/compiler: translate nir to dxil
Here's the code to emit DXIL code from NIR. It's big and bulky as-is,
and it needs to be split up a bit.

This is the combination of a lot of commits from our development branch,
containing code by several authors.

Co-authored-by: Bill Kristiansen <billkris@microsoft.com>
Co-authored-by: Boris Brezillon <boris.brezillon@collabora.com>
Co-authored-by: Daniel Stone <daniels@collabora.com>
Co-authored-by: Gert Wollny <gert.wollny@collabora.com>
Co-authored-by: Jesse Natalie <jenatali@microsoft.com>
Co-authored-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>
2020-11-10 15:37:07 +00:00
Erik Faye-Lund
10dfd3cfb4 compiler: add SYSTEM_BIT_FRONT_FACE
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>
2020-11-10 15:37:07 +00:00
Gert Wollny
449c4baf50 nir/print: print GS extra info
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7477>
2020-11-10 15:37:07 +00:00
Samuel Pitoiset
1c5271346a nir/algebraic: optimize bitfield_select(a, b, 0) to iand(a, b)
(src0 & src1) | (~src0 & src2) to (src0 & src1).

fossils-db (Polaris10):
Totals from 873 (0.63% of 138014) affected shaders:
SGPRs: 33781 -> 33733 (-0.14%)
VGPRs: 37704 -> 37520 (-0.49%); split: -0.51%, +0.02%
CodeSize: 3861460 -> 3853424 (-0.21%); split: -0.21%, +0.00%
MaxWaves: 5306 -> 5305 (-0.02%)
Instrs: 743798 -> 743486 (-0.04%); split: -0.04%, +0.00%
Cycles: 10962244 -> 10960936 (-0.01%); split: -0.01%, +0.00%
VMEM: 128309 -> 128350 (+0.03%); split: +0.33%, -0.30%
SMEM: 44797 -> 44113 (-1.53%); split: +0.02%, -1.54%
Copies: 71875 -> 71674 (-0.28%); split: -0.31%, +0.03%
PreSGPRs: 23484 -> 23479 (-0.02%)
PreVGPRs: 34582 -> 34529 (-0.15%)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7479>
2020-11-09 19:51:27 +00:00
Jason Ekstrand
f95665cfeb nir/lower_bit_size: Add support for lowering subgroup ops
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00
Jason Ekstrand
2c4b47184d nir/lower_bit_size: Pass a nir_instr to the callback
This way we can start supporting more than just ALU ops.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00
Jason Ekstrand
15c6e05a72 nir/lower_bit_size: Don't cast comparison results
Some ALU ops (comparisons being the primary example) have a fixed
bit-size destination and, in that case, we don't want to insert a
conversion on the destination.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00
Jason Ekstrand
2bbe01b186 spirv: Add support for SPV_EXT_shader_image_atomic_int64
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:40 +00:00
Jason Ekstrand
5a3e22018d nir: Allow 64-bit image atomics
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:39 +00:00
Jason Ekstrand
79f477c3c6 compiler/types: Add 64-bit image types
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:39 +00:00
Jason Ekstrand
b725fbd191 nir: Validate image atomic formats
GLSL requires that image atomics have formats and there are rules about
things matching properly.  We should enforce those in NIR unless we have
reason to do otherwise.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:39 +00:00
Jason Ekstrand
72f1c9aef5 nir: Print formats on image intrinsics as text
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:39 +00:00
Jason Ekstrand
d22fafa20b spirv: Update headers and metadata from latest Khronos commit
This corresponds to 5ab5c96198f30804a6a29961b8905f292a8ae600
("Reserve additional loop control bit for Intel extension (NoFusionINTEL) (#175)") in
https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7509>
2020-11-09 17:17:39 +00:00
Erik Faye-Lund
92374aebe2 spirv: correct sematic-typo
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7504>
2020-11-09 16:31:02 +00:00
Rhys Perry
a0b42da0a2 spirv: fix GLSLstd450Modf/GLSLstd450Frexp when the destination is vector
We can't write to an individual component in a function_temp vector, so we
have to use vtn_variable_store() which does a load+insert+store.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3484
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6231>
2020-11-06 17:21:16 +00:00
Daniel Schürmann
f0a88dbefa nir/lcssa: consider loops with no back-edge invariant
Polaris:
Totals from 6233 (4.52% of 138014) affected shaders:
SpillSGPRs: 47860 -> 48976 (+2.33%)
CodeSize: 69764704 -> 69120700 (-0.92%); split: -0.97%, +0.04%
Instrs: 13801184 -> 13594107 (-1.50%)
Cycles: 1628800928 -> 1516137888 (-6.92%)
VMEM: 910459 -> 910208 (-0.03%); split: +0.00%, -0.03%
SMEM: 436625 -> 435194 (-0.33%); split: +0.06%, -0.38%
SClause: 534750 -> 534620 (-0.02%); split: -0.03%, +0.00%
Copies: 1587121 -> 1542867 (-2.79%); split: -2.81%, +0.03%
Branches: 545016 -> 509354 (-6.54%)
PreSGPRs: 618545 -> 619354 (+0.13%); split: -0.09%, +0.22%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5924>
2020-11-06 15:56:18 +00:00
Samuel Pitoiset
77d6fda0f5 nir/algebraic: distribute imul(iadd(a, b), c) when b and c are constants
This distributes imul(iadd(a, b), c) to iadd(imul(a, c), b * c)
when both b and c are constants. This might allow some compiler
backends to create more MADs.

For ACO, this allows to combine more DS additions.

fossilds-db (Vega10):
Totals from 673 (0.49% of 136546) affected shaders:
VGPRs: 44548 -> 44516 (-0.07%); split: -0.11%, +0.04%
CodeSize: 8301552 -> 8286220 (-0.18%); split: -0.19%, +0.01%
MaxWaves: 2731 -> 2735 (+0.15%); split: +0.26%, -0.11%
Instrs: 1642684 -> 1638725 (-0.24%); split: -0.24%, +0.00%
Cycles: 20846156 -> 20793444 (-0.25%); split: -0.25%, +0.00%
VMEM: 108870 -> 108106 (-0.70%); split: +0.03%, -0.73%
SMEM: 35718 -> 35674 (-0.12%); split: +0.22%, -0.34%
VClause: 20603 -> 20622 (+0.09%); split: -0.01%, +0.10%
SClause: 48527 -> 48539 (+0.02%)
Copies: 156735 -> 156742 (+0.00%); split: -0.05%, +0.05%
PreSGPRs: 43169 -> 43166 (-0.01%); split: -0.02%, +0.02%
PreVGPRs: 41369 -> 41330 (-0.09%)

shader-db results on Intel:
Ice Lake
total instructions in shared programs: 20027588 -> 20027446 (<.01%)
instructions in affected programs: 71766 -> 71624 (-0.20%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 7 x̄: 2.03 x̃: 1
helped stats (rel) min: 0.10% max: 2.50% x̄: 0.29% x̃: 0.15%
95% mean confidence interval for instructions value: -2.42 -1.64
95% mean confidence interval for instructions %-change: -0.38% -0.20%
Instructions are helped.

total cycles in shared programs: 977525222 -> 977494323 (<.01%)
cycles in affected programs: 8884593 -> 8853694 (-0.35%)
helped: 56
HURT: 16
helped stats (abs) min: 2 max: 7852 x̄: 681.29 x̃: 400
helped stats (rel) min: <.01% max: 19.84% x̄: 2.79% x̃: 0.41%
HURT stats (abs)   min: 2 max: 1212 x̄: 453.31 x̃: 120
HURT stats (rel)   min: 0.05% max: 1.09% x̄: 0.32% x̃: 0.11%
95% mean confidence interval for cycles value: -802.75 -55.56
95% mean confidence interval for cycles %-change: -3.19% -1.01%
Cycles are helped.

total sends in shared programs: 1032273 -> 1032272 (<.01%)
sends in affected programs: 41 -> 40 (-2.44%)
helped: 1
HURT: 0

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7445>
2020-11-06 07:49:02 +00:00
Dave Airlie
9790fdf2ce vtn/opencl: add ctz support
ctz is a CL2.0 opcode but 3.0 requires it as well so just add support
for it.

Tested against CTS integer_ops integer_ctz test.

(long line broken up)

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7468>
2020-11-06 17:03:05 +10:00
Jason Ekstrand
03683b9b2e nir: Handle ray-tracing intrinsics and storage classes in copy-prop etc.
We need to consider shader calls as potential writes to their payloads.
For other ray-tracing intrinsics, we may not have a shader payload
pointer and have to treat them more like a barrier.  We also need to
ensure that global and SSBO reads/writes aren't propagated across shader
call intrinsics.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
5a28893279 spirv,nir: Add ray-tracing intrinsics
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
21b1b91549 nir,spirv: Add support for the ShaderCallKHR scope
It's currently entirely trivial.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
6b8fd65e84 spirv: Implement the new ray-tracing storage classes
The SPV_KHR_ray_tracing extension adds 6 new storage classes which is a
bit on the ridiculous side.  In order to avoid adding that many variable
modes to NIR, we make a few simplifying assumptions:

 1. CallableData and RayPayload data actually lives on the stack
    somewhere, presumably in the caller's stack.  We assume that these
    are no different from global variables and use nir_var_shader_temp
    for them.  We still need a separate storage class for the incoming
    variants but only so we can figure out which one the incoming one
    is and lower it to something useful.

 2. There's no difference between incoming CallableData and RayPaolad
    data.  We can use a single storage class for both.

 3. ShaderRecordBuffer data is just a global memory access.  This lets
    us avoid NIR variables entirely and just fetch the pointer via the
    shader_record_ptr system value and it's accessed using a 64-bit
    global memory pointer.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
84a8ca1db8 nir: Add new variable modes for ray-tracing
If we were desperate to reduce bits, we could probably also use
shader_in/out for hit attributes as they really are an output from
intersection shaders and read-only in any-hit and closest-hit shaders.
However, other passes such as nir_gether_info like to assume that
anything with nir_var_shader_in/out is indexed using vec4 locations for
interface matching.  It's easier to just add a new variable mode.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
aa4ea9c7ea nir: Add intrinsics for object to/from world RT sysvals
These are a bit more tricky than most because they're matrix system
values.  We make the intentional choice here to not bother with allowing
indirect addressing of columns for these.  Since they're system values,
they may be magically constructed somehow or come from weird hardware so
it's easier on back-ends to just handle any indirects with bcsel.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
07635a3284 nir/builder: Add a select_from_ssa_def_array helper
This is an operation we have to do already for nir_vector_extract and
I'm about to do something very similar for matrix columns.  Having a
more generic helper is useful.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00
Jason Ekstrand
46cd91bb45 spirv,nir: Add support for ray-tracing built-ins
Missing in this commit are NIR intrinsics for the ObjectToWorld and
WorldToObject built-ins.  Those are matrices and so they take a bit more
work and justify a separate commit.  For now, we add the enums and leave
the SYSTEM_VALUE <-> nir_intrinsic conversion commented out.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6479>
2020-11-05 23:36:46 +00:00