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Author	SHA1	Message	Date
Christoph Pillmayer	f367cdad0a	pan: Fix bi_load_tl dst arg name ... bi_load_tl's dst arg was named src, this was confusing. Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37955>	2025-10-20 15:14:06 +00:00
Christoph Pillmayer	eba3d3a17e	pan: Enable rematerialization for more ops ... IADD_IMM and uniform loads should not be spilled. Make them rematerializable. Restrict to loads that write at most one register for simplicity for now. Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com> Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37955>	2025-10-20 15:14:06 +00:00
Timur Kristóf	d20049b430	ac/nir/ngg_mesh: Lower num_subgroups to constant ... Mesh shader workgroups always have the same amount of subgroups. When the API workgroup size is the same as the real workgroup size, this is a small optimization (using a constant instead of a shader arg). When the API workgroup size is smaller than the real workgroup size (eg. when the number of output vertices or primitves is greater than the API workgroup size on RDNA 2), this fixes a potential bug because num_subgroups would return the "real" workgroup size instead of the API one. Cc: mesa-stable Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37947>	2025-10-20 14:05:40 +00:00
Silvio Vilerino	a5af8866df	p_video_codec::encode_bitstream_sliced: Add last_slice_completion_fence for PIPE_VIDEO_SLICE_MODE_AUTO ... Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37936>	2025-10-20 13:37:16 +00:00
Patrick Lerda	84dc9af3d4	r600: update nplanes support ... This change fixes "piglit/bin/ext_image_dma_buf_import-export -auto". Fixes: 02aaf360ae ("r600: Implement resource_get_param") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37840>	2025-10-20 11:42:35 +00:00
Patrick Lerda	3b1e3a40a8	r600: fix r600_draw_rectangle refcnt imbalance ... The object buf is referenced at the beginning of the r600_draw_rectangle() function and should be freed at the end. This issue was introduced with cbb6e0277f. Fixes: cbb6e0277f ("r600: stop using util_set_vertex_buffers") Signed-off-by: Patrick Lerda <patrick9876@free.fr> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37617>	2025-10-20 11:28:39 +00:00
David Rosca	ffec70465c	radeonsi/video: Remove rvid_buffer ... Not used anymore. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	9764748f91	radeonsi/vpe: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	0c270c602d	radeonsi/vce,uvd_enc: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	a0324576aa	radeonsi/vcn: Stop using rvid_buffer ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	a25db1c53c	radeonsi/video: Change si_vid_resize_buffer to take si_resource ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:07 +00:00
David Rosca	663eada9b2	radeonsi/uvd_enc: Don't use temporary feedback buffer when not needed ... We don't request feedback for create and destroy commands, so it's not needed to allocate feedback buffer. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:06 +00:00
David Rosca	1033ac0879	radeonsi/vcn: Don't use temporary feedback buffer when not needed ... We don't request feedback for create and destroy commands, so it's not needed to allocate feedback buffer. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:06 +00:00
David Rosca	86832f7499	radeonsi/vpe: Stop clearing embedded buffer on allocation ... If it was needed, it would be needed to clear it before every submission as well. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37884>	2025-10-20 11:00:05 +00:00
Martin Roukala (né Peres)	33232223f6	zink/ci: update the expectations of RADV-based pre-merge jobs ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:51 +00:00
Martin Roukala (né Peres)	da0f495428	radv/ci: update the expectations of pre-merge jobs ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:51 +00:00
Samuel Pitoiset	8e2bb3da5c	radv/ci: set RADV_DEBUG=novideo for NAVI31 too ... There are random VCN hangs with a repro rate around 20%. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:50 +00:00
Samuel Pitoiset	9b774963fe	radv/ci: set RADV_DEBUG=novideo for NAVI21 ... Otherwise, the jobs just hang. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:50 +00:00
Samuel Pitoiset	82cd2df7b0	radv/ci: bump number of deqp-runner jobs to 32 for GFX1201 ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:50 +00:00
Samuel Pitoiset	6fd1b9b397	radv/ci: drop RADV_PERFTEST=video_decode,video_encode for NAVI31 ... With up-to-date video firmwares, these flags are no longer needed. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:50 +00:00
Samuel Pitoiset	49d780db93	radv/ci: use the custom 6.17.3 kernel for POLARIS10 ... Looks like the SDMA regression is no longer reproducible. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:49 +00:00
Samuel Pitoiset	07d1461c53	radv/ci: use the custom 6.17.3 kernel for NAVI21/NAVI31 ... Now that the zerovram performance regression is fixed, everything should be fine. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:49 +00:00
Samuel Pitoiset	fc178c047d	radv/ci: uprev kernel to 6.17.3 + drm/buddy backported fixes for zerovram ... Until we have a stable kernel which contains these fixes. This applies to all jobs except NAVI21/NAVI31 which still use 6.6 and POLARIS10 which is stucked to 6.15.9 for now. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37934>	2025-10-20 10:30:48 +00:00
Collabora's Gfx CI Team	958cdea31d	Uprev Piglit to 2ac68e5fb59215ecf89049ec15f3f7494b51a589 ... 4147e9d7ae...2ac68e5fb5 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37950>	2025-10-20 09:57:30 +00:00
Ludvig Lindau	ba293ebbc8	panfrost/panvk: Reduce fills from LCRA ... Currently when LCRA spills it also fills on every single usage of the spilled value. This leads to a lot of cases where a spill is immediately followed by a fill. This patch reduces fills by LCRA by simply not filling until reaching either the index that caused LCRA to fail allocating registers, or the end of a block. Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37299>	2025-10-20 09:07:31 +00:00
Ludvig Lindau	a26e46980e	panfrost/panvk: Merge stores in vector spills ... Make vector spills use a single store of appropriate data size instead of using a store for every vector component. Reviewed-by: Eric R. Smith <eric.smith@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37299>	2025-10-20 09:07:31 +00:00
Jose Maria Casanova Crespo	a131530dd1	v3d: mark FRAG_RESULT_COLOR as output_written on SAND blits FS ... With the introduction of "v3d: Add support for 16bit normalised formats" https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35820 nir_lower_fragcolor is always called if shaders outputs_written shows that FRAG_RESULT_COLOR is used. But on SAND8/30 blit fragment shaders although the FRAG_RESULT_COLOR is used, it was not marked as output_written so the lowering was not applied. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14141 Fixes: ee48e81b26 ("v3d: Always lower frag color") Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37949>	2025-10-20 09:42:19 +02:00
Emma Anholt	aa96444149	wsi: Fix the flagging of dma_buf_sync_file for the amdgpu workaround. ... In my regression fix, I covered one of the two paths that had stopped setting the implicit_sync flag and thus triggered the amdgpu behavior we don't want, but probably the less common one. Fixes: f7cbc7b1c5 ("radv: Allocate BOs as implicit sync even if the WSI is doing implicit sync.") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13942 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37874>	2025-10-20 03:58:47 +00:00
Marek Olšák	e2b271d7b1	radeonsi/ci: update hawaii failures ... Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37910>	2025-10-19 17:01:44 +00:00
Marek Olšák	f5b648f6d3	winsys/radeon: fix completely broken tessellation for gfx6-7 ... The info was moved to radeon_info, but it was only set for the amdgpu kernel driver. It was uninitialized for radeon. Fixes: d82eda72a1 - ac/gpu_info: move HS info into radeon_info Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37910>	2025-10-19 17:01:43 +00:00
Benjamin Cheng	b1370e1935	radv/video: Fill maxCodedExtent caps first ... Later code (i.e. max qp map extent filling) depends on this. Fixes: ae6ea69c85 ("radv: Implement VK_KHR_video_encode_quantization_map") Reviewed-by: David Rosca <david.rosca@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37940>	2025-10-17 17:58:08 +00:00
Job Noorman	ad421cdf2e	nir: mark fneg distribution through fadd/ffma as nsz ... df1876f615 ("nir: Mark negative re-distribution on fadd as imprecise") fixed the fadd case by marking it as imprecise. This commit fixes the ffma case for the same reason. However, "imprecise" isn't necessary and nowadays we have "nsz" which is more accurate here. Use that for both fadd and ffma. Signed-off-by: Job Noorman <jnoorman@igalia.com> Fixes: 62795475e8 ("nir/algebraic: Distribute source modifiers into instructions") Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37930>	2025-10-17 08:58:59 +00:00
Frank Binns	b9baf2c260	pvr: Advertise VK_KHR_storage_buffer_storage_class ... Signed-off-by: Frank Binns <frank.binns@imgtec.com> Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com> Reviewed-by: Simon Perretta <simon.perretta@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37913>	2025-10-17 08:11:11 +00:00
Frank Binns	c6c0690723	pvr: Advertise VK_KHR_relaxed_block_layout ... This is already supported by the compiler and all the relevant conformance tests pass. Signed-off-by: Frank Binns <frank.binns@imgtec.com> Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com> Reviewed-by: Simon Perretta <simon.perretta@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37913>	2025-10-17 08:11:11 +00:00
Frank Binns	28cc04b400	pvr: sort extensions alphabetically ... Signed-off-by: Frank Binns <frank.binns@imgtec.com> Reviewed-by: Karmjit Mahil <karmjit.mahil@igalia.com> Reviewed-by: Simon Perretta <simon.perretta@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37913>	2025-10-17 08:11:10 +00:00
Eric Engestrom	412432d371	mr-label-maker: fix label for mesa release MRs ... Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37928>	2025-10-17 09:43:10 +02:00
Josh Simmons	b10c1a1952	radv: Fix crash in sqtt due to uninitalized value ... Fixes: 772b9ce411 ("radv: Remove qf from radv_spm/sqtt/perfcounter where applicable") Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37900>	2025-10-17 06:10:46 +00:00
Qiang Yu	11f2babddc	mesa,gallium: not touch TS when internal draws ... TS does not affect vertex pipeline draws. We keep mesh shader before radeonsi is ready. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	4711fb711c	gallium/blitter: no need to save TS state ... TS does not affect blitter currently. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	71e0895715	mesa,radeonsi: add comments about vertex and mesh pipeline shader states ... They are exclusive in mesa state tracker currently, so add some comments and assertions for developers. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	dcf2399e6f	radeonsi: save mesh shader when blit ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	ffc3d430db	radeonsi: simplify si_update_rasterized_prim while handle mesh shader ... Otherwise mesh shader ends in the "else" section. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	56a437183a	radeonsi: si_get_vs support mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	7e83962e85	radeonsi: update scratch va for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:19 +00:00
Qiang Yu	de4fb088d3	radeonsi: share some vertex pipe function with mesh pipe ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	e6e21dfbf2	radeonsi: kill outputs for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	4c315bdbfa	radeonsi: lower task/mesh shader io to mem ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	5931dbf7ac	radeonsi: add task info to screen ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:18 +00:00
Qiang Yu	73aebeec42	radeonsi: no ngg culling for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:17 +00:00
Qiang Yu	74894150f1	radeonsi: init pm4 state for mesh shader ... Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37505>	2025-10-17 03:52:17 +00:00