Commit graph

218162 commits

Author SHA1 Message Date
Rob Clark
f2e0495dc5 freedreno/decode: Split out domain based decoding
Decouple a bit more from the packet/descriptor handlers, before we start
adding more uses.

Just code motion.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:28 +00:00
Rob Clark
f0b4fbd80f ir3: Disasm shader descriptor stats
Extract stats about the descriptors used by a shader.  A later commit
will use this information to help filter the used descriptors and types.

Unfortunately a1.x usage throws a bit of a wrench into the gears, since
(like s2en) we don't know which tex/samp or even in some cases bindless
base is used.  This could perhaps be improved to detect the commmon case
of an immed value loaded into a1.x.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:28 +00:00
Rob Clark
d93b62c140 ir3: Rename cat6 UBO/UAV descriptor src
Makes it more clear which src arg is the descriptor, and makes it easier
for the disassembler to locate the src which references a descriptor.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:27 +00:00
Rob Clark
d7dc40b32f freedreno/decode: Allow dom[1] to be NULL
The lua script bridge does this.  Allow it.  Fixes crashes when script
tries to index non-existant fields.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39636>
2026-02-04 18:28:26 +00:00
Bernd Kuhls
248b818407 blake3: add blake3_neon.c only for little endian archs
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Fixes build error on big endian archs:

Build machine cpu family: x86_64
Build machine cpu: x86_64
Host machine cpu family: aarch64
Host machine cpu: cortex-a53
Target machine cpu family: aarch64
Target machine cpu: cortex-a53
[...]
../src/util/blake3/blake3_neon.c:6:2: error: #error "This implementation only supports little-endian ARM."
    6 | #error "This implementation only supports little-endian ARM."

as detected by buildroot autobuilders:
https://autobuild.buildroot.net/results/efd/efd07d97df4e0c1ceb07fc26e17898afef5435b9/build-end.log

For reference:
$ grep -i endian output/build/mesa3d-25.3.4/buildroot-build/cross-compilation.conf
endian = 'big'

Signed-off-by: Bernd Kuhls <bernd@kuhls.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39681>
2026-02-04 15:07:42 +00:00
Samuel Pitoiset
13c9e529bd radv: emit pending flushes after late decompressions with fbfetch
If the rendering state is inherited in the secondary, otherwise nothing
wait for the pending flushes after a decompression pass. One more
argument to stop delaying this.

Fixes
dEQP-VK.renderpasses.dynamic_rendering.partial_secondary_cmd_buff.local_read.*

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39678>
2026-02-04 13:49:47 +00:00
Samuel Pitoiset
cbf0a38fa4 ac,radv,radeonsi: shorten some emit macro names
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config -> cfg
uconfig -> ucfg
context -> ctx

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39680>
2026-02-04 13:27:49 +00:00
Samuel Pitoiset
83ca338e37 radv: disable unordered submits when SQTT queue events are enabled
Otherwise the QueuePresent event is missing and RGP is confused.

Fixes: 82d06b58ad ("radv: use vk_drm_syncobj_copy_payloads")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39158>
2026-02-04 13:04:19 +00:00
Samuel Pitoiset
6d7a1bc6ef radv/amdgpu: bypass GL2 for command buffer BOs
Better for latency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39674>
2026-02-04 12:45:06 +00:00
Caterina Shablia
f242a204ea pan/bi: print shaders with debug info when BIFROST_MESA_DEBUG=shaders,debuginfo is specified
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:12 +00:00
Caterina Shablia
ec16288448 pan/bi: propagate debug info
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:12 +00:00
Caterina Shablia
15443c343a panvk: propagate debug info through NIR when BIFROST_MESA_DEBUG=debuginfo is specified
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:11 +00:00
Caterina Shablia
5f5412c1c8 pan/bi: remove trailing space
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:10 +00:00
Caterina Shablia
1e6793f7b1 spirv: plumb spirv-dis --offsets
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39554>
2026-02-04 12:05:10 +00:00
Natalie Vock
cb571550cc mesa: Prevent building with LTO
LTO is not supported with Mesa. It has caused random impossible-to-debug
bugs for a long time, and LTO bug reports are generally considered a
"WONTFIX please disable LTO instead". Let's make this clear to users
and packagers so they don't run into more weird issues that result in
inactionable reports.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39671>
2026-02-04 11:38:14 +00:00
Natalie Vock
e48f46e342 meson: Identify LTO builds in the package version
Whether a build is LTO or not is relevant for debugging. Include the
info in the package version.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39671>
2026-02-04 11:38:14 +00:00
Hyunjun Ko
d2c24a0d8b anv/video: disable encoder on untested platforms
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Not enough tested on over Gen12 platforms.
Turns out to be not working on DG2, for example.

Cc: mesa-stable
Closes: #14449

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39676>
2026-02-04 10:39:09 +00:00
Loïc Molinari
8c2736e4c4 panfrost: Update clean_pixel_write_enable flag name for v6+
Match spec by using clean_tile_write_enable instead of
clean_pixel_write_enable for v6+ architectures.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
1c1f6cb53e pan/desc: Issue TSIX-2033 only affects pre-frame shaders
As opposed to pre-frame shaders 0 and 1, we can keep using the
INTERSECT mode for the post-frame shader when any of the clean
tile/pixel flags are set.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
9fc555db03 pan/desc: Cache clean tile state
Compute clean tile state once at FB descriptor emission and use the
cached results to set the clean tile/pixel write enable flag on the RT
and Z/S/CRC descriptors and to retrieve whether any of the clean tile
write flags is set.

This commit now also prevents setting the clean tile/pixel write
enable flag on descriptors when the associated attachment is
discarded.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
48582489e4 pan/desc: Move funcs closer to callers
Previous commit makes rt_clear() and rt_clean_pixel_write() calls
directly from pan_emit_rt(). Move these function definitions
closer. This will also improve diffs of coming commits.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
3c70b9ee53 pan/desc: Force pan_merge() ending semicolon
Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
76516cdf26 pan/desc: Emit common RGB render target config in pan_emit_rt()
This simplifies the initialization of common flags by setting them
outside of the modifier handlers. This also makes it more consistent
with the depth/stencil config which uses the same technique.

Panfrost bitfield packed descriptors are most commonly pushed into
Non-Cacheable memory. For descriptors packed in more than one step
(e.g. to support various modifiers), it's important to avoid mixing
loads and stores on the same cacheline for best performance. This is
why pan_merge() is first called on stack allocated packed descriptors
before copying into a BO.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
a9d96ad241 pan/desc: Only set clean_pixel_write_enable on clear (v4)
This only forces write-back of clean tiles when there's a clear.

Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:37 +01:00
Loïc Molinari
098b69a05c panfrost: Fix clean_pixel_write_enable forced check for AFBC
Clean tiles must actually be written back for AFBC buffers (color,
z/s) when either one of the effective tile size dimension is smaller
than the superblock dimension. This commit fixes the current check
which compares the effective tile size to the superblock size.

Fixes: 762a0f4133 ("panfrost: Add the concept of render block")
Signed-off-by: Loïc Molinari <loic.molinari@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38422>
2026-02-04 10:49:34 +01:00
Samuel Pitoiset
cd22fef4be radv/meta: remove unused emit_depth_stencil_resolve()
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39684>
2026-02-04 09:29:37 +01:00
Samuel Pitoiset
b304718002 radv/amdgpu: remove radv_dummy_winsys_create()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39684>
2026-02-04 09:29:24 +01:00
Samuel Pitoiset
f32721e3ae radv/meta: remove declared but unused radv_decompress_resolve_rendering_src()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39684>
2026-02-04 09:29:24 +01:00
Nanley Chery
c69f7904e3 anv: Enable YCRCB CMFs on Xe2+
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Allow the CCS_E aux-usage for YUV formats on Xe2+.

Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39628>
2026-02-04 02:23:50 +00:00
Nanley Chery
381f4a658f intel/isl: Add YCRCB CMF mappings for Xe2+
These formats are listed under "media mapping" on Bspec 63919.

Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39628>
2026-02-04 02:23:48 +00:00
Nanley Chery
23a3c8c972 intel: Disable CCS_E support for YCRCB on gfx12
The table in Bspec 47715 lists these formats as "Not Supported" in the
"Lossless Compression Support" column.

Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39628>
2026-02-04 02:23:48 +00:00
Maaz Mombasawala
a66d19b691 Revert "ci: disable vmware farm"
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This reverts commit 1d120c1bf2.

Docker authentication issue, should be resolved now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39472>
2026-02-03 23:14:27 +00:00
Maaz Mombasawala
a188bac3f3 svga: Update CI expectations.
Update expectations based on run -
https://gitlab.freedesktop.org/mombasa/mesa/-/pipelines/1597265/

Signed-off-by: Maaz Mombasawala <maaz.mombasawala@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39683>
2026-02-03 22:54:51 +00:00
Karol Herbst
5890aedf8c nak: replace get_io_addr_offset with nir_opt_offsets
Totals:
Totals:
CodeSize: 9521188272 -> 9474779520 (-0.49%); split: -0.50%, +0.01%
Number of GPRs: 47361498 -> 47340754 (-0.04%); split: -0.05%, +0.00%
SLM Size: 5444552 -> 5444436 (-0.00%)
Static cycle count: 6182267636 -> 6141873245 (-0.65%); split: -0.69%, +0.03%
Spills to memory: 44288 -> 44241 (-0.11%)
Fills from memory: 44288 -> 44241 (-0.11%)
Spills to reg: 185307 -> 185246 (-0.03%); split: -0.06%, +0.03%
Fills from reg: 225943 -> 225895 (-0.02%); split: -0.04%, +0.01%
Max warps/SM: 50637496 -> 50646924 (+0.02%); split: +0.02%, -0.00%

Totals from 118675 (10.20% of 1163204) affected shaders:
CodeSize: 2675917792 -> 2629509040 (-1.73%); split: -1.77%, +0.04%
Number of GPRs: 7190170 -> 7169426 (-0.29%); split: -0.32%, +0.03%
SLM Size: 2694216 -> 2694100 (-0.00%)
Static cycle count: 3780817453 -> 3740423062 (-1.07%); split: -1.12%, +0.05%
Spills to memory: 40938 -> 40891 (-0.11%)
Fills from memory: 40938 -> 40891 (-0.11%)
Spills to reg: 78989 -> 78928 (-0.08%); split: -0.14%, +0.06%
Fills from reg: 83274 -> 83226 (-0.06%); split: -0.10%, +0.04%
Max warps/SM: 4219736 -> 4229164 (+0.22%); split: +0.23%, -0.01%

Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:51 +00:00
Karol Herbst
e5bf1f5aff nir/opt_offsets: support nvidias intrinsics
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:51 +00:00
Karol Herbst
cb60e4d14f nir/opt_offsets: support negative offsets and 64 bit sources
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:51 +00:00
Karol Herbst
f456735d11 nak: convert memory load/stores to nv variants
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:50 +00:00
Karol Herbst
4add3959e9 nir: add BASE to nvidia memory intrinsics
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:50 +00:00
Karol Herbst
e779538ad2 nir: add nvidia IO intrinsics
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39525>
2026-02-03 22:23:50 +00:00
Valentine Burley
24073b66fa tu/ci: Document a618-vk-asan failure
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Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39639>
2026-02-03 21:53:18 +00:00
Valentine Burley
d4ad50752f tu: Fix memory leak of patchpoints_ctx in dynamic rendering
tu_CmdBeginRendering was unconditionally allocating a new
patchpoints_ctx. When resuming a render pass chain, this overwrote the
existing context from the suspended pass, leaking it and all associated
FDM patchpoints.

Fixes: 0dd06c74d6 ("tu: Fix FDM patchpoint memory leak")
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39639>
2026-02-03 21:53:16 +00:00
Konstantin Seurer
ce4d338b0d radv: Use stderr for shader printf
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Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39640>
2026-02-03 20:00:15 +00:00
Konstantin Seurer
24a1e3d8c2 radv/bvh: Make sure internal nodes are collapsed when possible
Avoiding NaNs should have the same effect but it's good practice to not
rely on float OPs for correctness.

Fixes: 95a89f7 ("radv: Report smaller bvh sizes when possible")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39640>
2026-02-03 20:00:15 +00:00
Konstantin Seurer
60c1e4e3e6 vulkan: Make sure no NaNs end up in the BVH
Fixes: 2032268 ("vulkan: Avoid NAN in the IR BVH")
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39640>
2026-02-03 20:00:15 +00:00
Konstantin Seurer
2f3a9c10f4 radv/rra: Fix nullptr dereference
cc: mesa-stable

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39640>
2026-02-03 20:00:15 +00:00
Frank Binns
1bc23bdbb8 pvr/ci: document some recent flakes
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39646>
2026-02-03 19:38:16 +00:00
Kenneth Graunke
6fbe201a12 brw: Convert VS/TES/GS outputs to URB intrinsics.
For VS/TES/GS, we lower all outputs to temporaries and emit copies at the
end of the shader (or for GS, at each EmitVertex() call) from those
temporaries back to real outputs.  We use vec8 URB writes without
writemasking, since our output area's contents are undefined anyhow.

This is simpler than what TCS and Mesh do, which allow for output
variables to be read/written at a per-component level at any time,
with the output memory being used for cross-thread communication.

Rather than using the complicated TCS/Mesh handling and relying on
vectorization, we port the emit_urb_writes() approach to NIR.  This
also takes care of emitting the VUE header with default values when
fields aren't explicitly written by the shader.

We also handle multiview in the process.  It simplifies things, and
also drops another case of non-semantic IO in brw.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39666>
2026-02-03 19:11:21 +00:00
Kenneth Graunke
52341b8b9c brw: Split EOT handling out of emit_urb_writes()
The TES workaround code is still going to be needed even after
we rework URB output handling for VS/TES/GS to use NIR intrinsics.

For VS, we know at least one URB write will have been emitted at
the end of the program, so we can just tag it.

GS already handles EOT via emit_gs_thread_end().

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39666>
2026-02-03 19:11:21 +00:00
Kenneth Graunke
1f0773e951 brw: Add VUE header varyings to io_component()
This is needed for VS/TES/GS outputs.  Mesh takes a different path
because those are per-primitive.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39666>
2026-02-03 19:11:21 +00:00
Kenneth Graunke
54def4020c brw: Set a valid varying_to_slot for VUE header fields other than PSIZ
This lets us look up things in varying_to_slot[] without having to
special case VIEWPORT, LAYER, and PRIMITIVE_SHADING_RATE.  All of them
map to the same slot as PSIZ, slot 0, the VUE header.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39666>
2026-02-03 19:11:20 +00:00