Commit graph

155387 commits

Author SHA1 Message Date
Connor Abbott
3cd39c2b32 tu: Enable VK_KHR_swapchain_mutable_format
This is already implemented entirely in common code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16976>
2022-06-13 14:58:32 +00:00
Denis Pauk
79b88852c8 panvk: Return VK_ERROR_INCOMPATIBLE_DRIVER for Midgard
Midgard is unsupported after merge of !16915

Signed-off-by: Denis Pauk <pauk.denis@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16991>
2022-06-13 14:44:16 +00:00
Alyssa Rosenzweig
c43882ad54 panfrost: Allow pixels using discard to be killed
info.fs.sidefx considers discard() to be a side effect. That definition is...
dubious at best. It certainly isn't the definition needed for forward pixel
kill. The only reason pixels couldn't be killed by FPK is if the shader has side
effects in the sense of writing to memory. Use that more precise condition so
FPK works more often.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Closes: #5607
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16984>
2022-06-13 14:23:55 +00:00
Francisco Jerez
96e7e92f0d intel/fs/xehp+: Emit scheduling fence for all NIR barriers on platforms with LSC.
Tested-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15743>
2022-06-12 12:56:47 +03:00
Tapani Pälli
47773a5d7c intel/fs: setup SEND message descriptor from nir scope
This fixes many tests in following groups on DG2:
   dEQP-VK.memory_model.*
   dEQP-VK.fragment_shader_interlock.*

v2: use memory scope and setup descriptor also
    for barriers without defined scope (Curro),
    use local scope and flush type none with
    NIR_SCOPE_NONE scope, cleanups (Lionel)

v3: use LSC_FENCE_THREADGROUP for NIR_SCOPE_WORKGROUP,
    remove default case (Curro), use eviction if scope
    was not defined, use LSC_FENCE_GPU scope for vertex
    stage

v4: use LSC_FENCE_TILE independent of stage for device
    scope (Curro)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15743>
2022-06-12 12:29:47 +03:00
Mike Blumenkrantz
92f9a509cf zink: more lavapipe glcts fails
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16994>
2022-06-11 21:04:48 +00:00
Mike Blumenkrantz
d64fbb8886 zink: warn on missing customBorderColorWithoutFormat
this is required

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16982>
2022-06-11 13:42:42 +00:00
Eric Engestrom
92e61dcee5 docs: show and link to the new macOS CI
Show the badge with the status of the new macOS CI introduced in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16875,
and make it a link to the build details.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Yurii Kolesnykov <root@yurikoles.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16941>
2022-06-11 12:44:42 +01:00
Marek Olšák
9490ae5561 ac/gpu_info: clamp gart_size_kb and vram_size_kb to fix buggy kernel driver
amdgpu returns 12 TB of GTT on Kaveri, which resulted in 0 KB of GTT
after the conversion to uint32_t, which caused us to report 0 as the UBO
size, which disabled UBOs and downgraded the driver to OpenGL 3.0.

Fixes: aee8ee17a5 - radeonsi: change max TBO/SSBO sizes again and rework max alloc size
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6642

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
bdf3797aeb ac,radeonsi: don't export null from PS if it has no effect on gfx10+
We just need to pass the uses_discard flag to the epilog.

The hw skips the export anyway. This will hang if SPI registers declare
an output format or KILL_ENABLE is set because those cases require
an export with done=1.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
e4b7088779 radeonsi: allocate only 1 GDS OA counter for gfx10 NGG streamout
It works with just one.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
0f48c581f9 radeonsi: allocate GDS only once per process
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
4d4bd7cb5b winsys/amdgpu: add a kernel GDS management workaround retrying on -ENOMEM
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
dfa8dcf80e radeonsi: remove streamout code from shaders if no streamout buffers are bound
This is an optimization using asynchronous shader compilation.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
dbbbe73d05 radeonsi: fix NGG streamout hang by allocating GDS in the right place
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
3f900df071 radeonsi: inline gfx10_emit_streamout_begin/end
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
002e34d860 radeonsi: unconditionally enable the streamout overflow query with NGG
It fails some tests, but we need it for gfx11.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
0f4f98ea50 radeonsi: fix a crash in gfx10_sh_query_get_result_resource
If tmp_buffer (in ssbo[1]) is NULL, setting the writable bit causes
the called function to access the NULL buffer.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
fc392ff104 radeonsi: fix an NGG streamout hang with monolithic shaders
ac_llvm_add_target_dep_function_attr has no effect if the function is
inlined.

amdgpu-gds-size determines m0 for ds_sub_u32 gds, which hangs if it's 0.

This helps both gfx10 and gfx11, though it will only be used by gfx11
after we enable streamout.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
a9f7744cfe radeonsi: rework how vs_state_bits is set and unpacked
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
c2342e6770 radeonsi: move GS_STATE bits to the end to make space at the beginning
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
c9c7dcb619 radeonsi: rename and regroup VS_STATE definitions
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
091617002f radeonsi: rework how VS_STATE_BITS are set for VS, TES, and GS
We need more GS/NGG bits, so we need to add current_gs_state for that.
This simplifies the logic in the draw code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
928e5f240d radeonsi: simplify how pipeline statistic offsets are computed
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
57b7dcd9db radeonsi: add BREAK_BATCH at the beginning of IBs
to fix possible issues if the previous IB comes from a different app

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
eea46094ff radeonsi: set INTERPOLATE_COMP_Z to 0 to work around an EQAA bug
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
4f3c74ddfb radeonsi: determine DB_SHADER_CONTROL in si_shader_ps
This is cleaner and more flexible.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
8e879dcedd radeonsi: restructure PS no-export fixups
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
7cbea71aab radeonsi: fix polygon stippling without color and Z outputs (v2)
We need to handle the fact that it kills pixels.

v2: also update si_update_ps_inputs_read_or_disabled

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
56359e9f6e radeonsi: remove unused dword from wait_mem_scratch
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
8e0d34ce98 radeonsi: fix uninitialized wait_mem_scratch_tmz
The initialization was dead code because it's allocated later.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
705e9af29a radeonsi: don't use info.gs.invocations if it's not GS
It's a union, which makes gs.invocations undefined for VS and TES.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
3b9cd2469e radeonsi: print LDS size in bytes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Marek Olšák
8edafaa25c winsys/amdgpu: use AMDGPU_IB_FLAG_PREAMBLE for the CS preamble on gfx10+
This skips the preamble for following IBs if the queue receives IBs from
the same context back-to-back. This eliminates VGT_FLUSH (for tess and
legacy GS) and PS_PARTIAL_FLUSH (for gfx11) in those cases if the preamble
contains them.

v2: only use this on gfx10+ due to stability issues on Stoney and limited
    testing

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16885>
2022-06-11 11:14:16 +00:00
Konstantin Seurer
1592921c59 radv: Move some rt intrinsics to the top
We need to move tr intrinsics to the top of the
shader that might be overwritten by
nir_intrinsic_rt_trace_ray.

Fixes the Khronos reflection sample.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16889>
2022-06-11 09:30:56 +00:00
Erik Faye-Lund
cbcdcc412c dzn: enable binding_model tests
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16904>
2022-06-10 22:14:14 +00:00
Erik Faye-Lund
5288fe31b4 microsoft/spirv_to_dxil: lower cube-images to 2d arrays
textureLoad() doesn't work on cube images. We need to lower cube
images to 2D arrays.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16904>
2022-06-10 22:14:14 +00:00
Erik Faye-Lund
00837c6bef microsoft/compiler: make sampler-lowering optional
We don't want this in DZN, so let's make it optional.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16904>
2022-06-10 22:14:14 +00:00
Erik Faye-Lund
fff03d2bd3 microsoft/compiler: mark image-functions as such
These functions only deal with images, so let's make that clear.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16904>
2022-06-10 22:14:14 +00:00
Erik Faye-Lund
b386802bb9 d3d12: move cubemap-lowering to common-code
We're going to want to do part of this in DZN as well.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16904>
2022-06-10 22:14:14 +00:00
Mike Blumenkrantz
98d7a9a9e4 zink: run copy_prop_vars during optimization
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16973>
2022-06-10 21:10:51 +00:00
Mike Blumenkrantz
5a95c6b328 zink: rewrite atomic ssbo intrinsics as atomic derefs
todo--

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16973>
2022-06-10 21:10:51 +00:00
Mike Blumenkrantz
0afb2e34c2 zink: more requirement docs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16981>
2022-06-10 20:53:34 +00:00
Mike Blumenkrantz
3b8e4457d2 zink: add feature req for border colors
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16981>
2022-06-10 20:53:34 +00:00
Mike Blumenkrantz
6b38907b7f zink: fix feature requirement
this is ARB_texture_buffer_object_rgb32, and both bits are needed

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16981>
2022-06-10 20:53:34 +00:00
Georg Lehmann
9ccc683973 anv: Implement VK_EXT_non_seamless_cube_map.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12730>
2022-06-10 18:31:57 +00:00
Pierre-Eric Pelloux-Prayer
3d37291e1c radeonsi: prevent recursion in si_decompress_dcc
This avoids u_blitter recursion:

 #0  util_blitter_set_running_flag
 #1  util_blitter_custom_color
 #2  si_blit_decompress_color
 #3  si_decompress_dcc
 #4  si_texture_disable_dcc
 #5  si_update_ps_colorbuf0_slot
 #6  si_bind_ps_shader
 #7  util_blitter_restore_fragment_states
 #8  util_blitter_custom_color
 #9  si_blit_decompress_color
 #10 si_decompress_dcc
 #11 si_sdma_copy_image
 #12 si_blit

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16962>
2022-06-10 17:40:18 +00:00
Pierre-Eric Pelloux-Prayer
813e60f1ea tradeonsi: fix preamble state producing incorrect packets
If the first time the preamble is written, one of the rings
isn't allocated, we wouldn't write the RING_SIZE to the preamble.

Later, when the preamble gets updated after the ring allocation,
the new RING_SIZE packet would overwrite other packets.

To prevent this, always write the RING_SIZE (the alternative would
be to write NOP packets).

This fix "*ERROR* Illegal register access in command stream" hangs
I observed on GFX8.

Fixes: 32c7805ccc ("radeonsi: merge all preamble states into one")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16962>
2022-06-10 17:40:18 +00:00
Georg Lehmann
dcdd31ae96 aco: Remove r128_a16 MIMG builder option.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16969>
2022-06-10 15:51:26 +00:00
Georg Lehmann
0ca6653ada aco: Print r128/a16 MIMG bits separately.
These both exist since Navi and we can have instructions which are one but
not the other.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16969>
2022-06-10 15:51:26 +00:00