Commit graph

160148 commits

Author SHA1 Message Date
Yonggang Luo
785ca13323 wsi: Fixes passing argument 1 of ‘mtx_unlock’ from incompatible pointer type
../../src/vulkan/wsi/wsi_common_display.c:2908:15: error: passing argument 1 of ‘mtx_unlock’ from incompatible pointer type [-Werror=incompatible-pointer-types]
 2908 |    mtx_unlock(&wsi->wait_mutex);
      |               ^~~~~~~~~~~~~~~~
      |               |
      |               pthread_mutex_t *

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Yonggang Luo
2e4f874fa5 freedreno: Fixes error: passing argument 1 of ‘pthread_mutex_unlock’ from incompatible pointer type in tu_pipeline.c
src/freedreno/vulkan/tu_pipeline.c:4723:25: error: passing argument 1 of ‘pthread_mutex_unlock’ from incompatible pointer type [-Werror=incompatible-pointer-types]
 4723 |    pthread_mutex_unlock(&dev->pipeline_mutex);
      |                         ^~~~~~~~~~~~~~~~~~~~
      |                         |
      |                         mtx_t *
In file included from ../../src/freedreno/vulkan/tu_common.h:14,
                 from ../../src/freedreno/vulkan/tu_pipeline.h:13,
                 from ../../src/freedreno/vulkan/tu_pipeline.c:10:
/usr/include/pthread.h:835:51: note: expected ‘pthread_mutex_t *’ but argument is of type ‘mtx_t *’
  835 | extern int pthread_mutex_unlock (pthread_mutex_t *__mutex)

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23733>
2023-06-20 00:05:48 +00:00
Caio Oliveira
1f3869ed4e nir/print: Use mesa_scope_name() function to print scopes
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Caio Oliveira
45bd6cfe28 compiler: Add mesa_scope_name() function
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Caio Oliveira
59cc77f0fa compiler: Move from nir_scope to mesa_scope
Just moving the enum and performing renames, no behavior change.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23328>
2023-06-19 23:29:26 +00:00
Karol Herbst
4d26b38caf rusticl/program: pass our max param size along to the spirv validator
Fixes "api min_max_parameter_size" in spir-v mode

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Karol Herbst
99a480ba9b clc: allow passing custom validator options
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Karol Herbst
8f7da6f052 clc: fix SPIRVMessageConsumer for NULL src
This happens if we pass our own validator options. It's nothing we can
control, SPIRV-Tools just passes NULL instead of "input".

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23700>
2023-06-19 22:54:59 +00:00
Gert Wollny
e09754c658 r600/sfn: Clean up FS member initialization
All members that are initialized with predefined values should
be initialized with the declaration.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23717>
2023-06-19 22:40:44 +00:00
Gert Wollny
201b46e487 r600/sfn: on R600/R700 write a dummy pixel output if there is a gap
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9223

Fixes: 98d65120cb
  r600/sfn: Fix FS out handling

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23717>
2023-06-19 22:40:44 +00:00
Lionel Landwerlin
0e728ea7b0 anv: avoid private buffer allocations in vkGetDeviceImageMemoryRequirementsKHR
The whole point of vkGetDeviceImageMemoryRequirementsKHR is to avoid
creating an image so we should completely avoid any allocation like
the private binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4075dd16ab ("anv: implement vkGetDeviceImageMemoryRequirementsKHR")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23720>
2023-06-19 18:35:30 +03:00
Karol Herbst
714e11fe04 rusticl/format: enable all trivial to support optional image formats
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:07 +02:00
Karol Herbst
976ba09f57 rusticl/format: move format table generation into a macro
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:05 +02:00
Karol Herbst
9112aeb4a4 rusticl/format: document cl to pipe format mapping
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:03 +02:00
Karol Herbst
092abd8b9a rusticl/format: add required format table for CL2.0
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:07:01 +02:00
Karol Herbst
6a874d7615 rusticl/format: drop req_for_3d_image_write_ext
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:58 +02:00
Karol Herbst
d0ba3ab0b5 rusticl/format: extract required format checks into const functions
Also dropping the 3D image write special case, because there is nothing in
the spec treating it differently.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:56 +02:00
Karol Herbst
ceb1c292b5 rusticl/format: extract CL format to pipe format mapping into const function
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:54 +02:00
Karol Herbst
6a259c0b94 rusticl/format: pass order and type to rusticl_image_format directly
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:51 +02:00
Karol Herbst
4999f9995e rusticl/mem: fix validation of packed image formats
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:48 +02:00
Karol Herbst
73f86c9b9d rusticl/mem: cache the pipe_format
This moves the expensive to_pipe_format call to image creation time.

Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nora Allen <blackcatgames@protonmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23714>
2023-06-19 14:06:45 +02:00
Eric Engestrom
ec8932fd63 radv: fix formatting
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23719>
2023-06-19 11:19:42 +01:00
Iago Toral Quiroga
5cdb2371fd v3dv: expose shaderImageGatherExtended
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
e31aff59d8 broadcom/compiler: handle textureGatherOffsets
There is a lowering in NIR for this so we just need to enable it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
0de89e10ba nir/lower_tex: handle lower_tg4_offsets with lower_tg4_broadcom_swizzle
This pass uses a safe iterator so it can't lower new instructions that are
injected as part of the lowering, which is exactly what lower_tg4_offsets
does, and if lower_tg4_broadcom_swizzle is also set then we need to lower
these new instructions. Handle this by running the pass twice when both
are set: the first pass will only handle lower_tg4_offsets and
the second pass (which will see the new tg4 instructions produced with
lower_tg4_offsets) will process the remaining options, including
lower_tg4_broadcom_swizzle.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Iago Toral Quiroga
65353814a3 nir/lower_tex: copy missing fields when creating copy of tex instruction
This is missing both texture and sampler indices.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23616>
2023-06-19 08:13:06 +00:00
Samuel Pitoiset
3208844539 radv: use cs_execute_ib() for GFX, MBCP and DGC IBs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
afbe187715 radv/amdgpu: add cs_execute_ib() for executing IBs
This will be used to implement support for DGC with RADV_DEBUG=noibs,
DGC for secondaries and for future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23671>
2023-06-19 07:53:35 +00:00
Samuel Pitoiset
0551954e80 radv/amdgpu: remove useless assert in radv_amdgpu_winsys_cs_submit_internal()
The zero CS submission path is used instead, and this assertion isn't
really useful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
8e1579a214 radv/amdgpu: fix a buffer overflow for submissions with RADV_DEBUG=noibs
With RADV_DEBUG=noibs (aka no chaining) the number of IBs to submit
depends on the number of old IB buffers of every CS.

This fixes a stack smashing error.

Fixes: 53b439d24f ("radv/amdgpu: Use STACK_ARRAY for IB array to reduce stack usage."
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23669>
2023-06-19 07:33:35 +00:00
Samuel Pitoiset
795bf984c6 radv: reserve space for shadowed regs
Tested on RDNA2, hopefully the space reservation is large enough for
other chips as well.

Fixes: 7893040f80 ("radv: Add stricter space checks.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23672>
2023-06-19 07:07:37 +00:00
Samuel Pitoiset
a5cdc4840d radv: use IB for the GFX preamble on GFX6
GFX6 supports IBs without any issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
Samuel Pitoiset
e20a0f32f2 radv: do not use IB for the GFX preamble with RADV_DEBUG=noibs
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23670>
2023-06-19 06:48:21 +00:00
Gert Wollny
e0ca73e96d r600/sfn: Don't deref unused group slots
Fixes: e57643cf5 (r600/sfn: Add handling for R600 indirect access alias handling)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9219

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23711>
2023-06-18 19:01:01 +00:00
Gert Wollny
3a569fbf9b r600: Split tex CF only if written component is read
There is no need to split the CF if only the register ID
in a previous write is the same, we should look at the actual
slots instead, ut we have also to take writes of 0 and 1 into
account.

Cc: mesa-stable

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23710>
2023-06-18 07:22:14 +00:00
Marek Olšák
da4b5b4a47 intel/ci: disable iris-jsl-deqp because it always fails for an AMD MR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
845ed015dd radeonsi: remove gfx10 NGG streamout
Unused and unstable. Keep it only for gfx11.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
283be8ac3b radeonsi: handle GE_CNTL and IA_MULTI_VGT_PARAM as a tracked register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
12b123fdb7 radeonsi: handle VGT_LS_HS_CONFIG like a tracker register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
7065bbdc23 radeonsi: handle VGT_GS_OUT_PRIM_TYPE like a tracked register
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
315231b5a5 radeonsi: eliminate redundant compute SH register changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
35fa013545 radeonsi: handle demoted si_pm4_set_reg_idx3 as si_pm4_set_reg
to allow merging packets; otherwise no change in behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
29e1d0ac4f radeonsi: set non-graphics uconfig registers first in the preamble
we want to keep all SH registers next to each other, so that we can use
only one SET_SH_REG_PAIRS_PACKED packet

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
52087d5772 radeonsi: remove sscreen parameter from si_pm4_set_reg_idx3
si_pm4_state now contains the screen.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
7d2a0bda77 radeonsi: add more variables into si_pm4_state and rework how it's created
to be used later

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
8c7e32fb33 radeonsi: don't needlessly invalidate L0/L1 caches at the beginning of IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c5a565d094 radeonsi: don't do PFP_SYNC_ME before CP DMA and compute blits
It's not needed before them, and we already set it after them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
76664c1677 radeonsi: shrink the last field of tcs_offchip_layout due to LDS limit
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
c89ca3b47f radeonsi: change si_emit_derived_tess_state into a state atom
This splits the state into an update function and an emit function
setting the registers, and only 2 functions update it: set_patch_vertices
and si_update_shaders.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00
Marek Olšák
d891bd7c3a radeonsi: fix RB+ and gfx11 issues with framebuffer state
This fixes most gfx11 test failures.

Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23687>
2023-06-17 23:42:21 +00:00