Commit graph

201640 commits

Author SHA1 Message Date
Samuel Pitoiset
ef9fd1c9be radv: set radv_disable_dcc=true for WWE 2k23
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This game is no longer available Steam, so it's more annoying to
reproduce the issue.

Let's disable DCC for that game to workaround rendering issues which
are likely game bugs.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10850
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34607>
(cherry picked from commit 5841d44f91)
2025-04-30 14:19:01 +02:00
Samuel Pitoiset
1e401d3d25 radv: fix re-emitting VRS state when rendering begins
This state also depends on whether a VRS attachment is used.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11693
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34735>
(cherry picked from commit 1fccc09abe)
2025-04-29 16:38:19 +02:00
Samuel Pitoiset
5c21544dd8 radv: only enable DCC for invisible VRAM on GFX12
DCC should only be allowed on invisible VRAM, otherwise the CPU could
read the data and it will read garbage if it's compressed.

This also caused GPU hangs after suspend/resume probably because
some buffers were compressed when moved back from GTT to VRAM.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12962
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12922
Fixes: 9af11bf306 ("radv: add initial DCC support on GFX12")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34347>
(cherry picked from commit 410f7f9f6e)
2025-04-29 15:39:10 +02:00
David Rosca
c1ad3d28c0 radv: Use radv_format_to_pipe_format instead of vk_format_to_pipe_format
Fixes: 9af11bf306 ("radv: add initial DCC support on GFX12")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34274>
(cherry picked from commit 3ef0ee2241)
2025-04-29 15:39:06 +02:00
Eric Engestrom
1032290a4e .pick_status.json: Update to 5a55133ce7 2025-04-29 15:39:03 +02:00
Loïc Minier
32c9fc1f45 freedreno: check if GPU supported in fd_pipe_new2
fd_pipe_new2 can segfault when trying to set the is_64bit flag on new
pipes. This can happen when the current GPU is not be listed in the
fd_dev_recs table because it's not supported by mesa, but is supported by
the kernel.

Add a helper function to test if the current GPU is in the supported table,
and use it in fd_pipe_new2.

Signed-off-by: Loïc Minier <loic.minier@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33830>
(cherry picked from commit c36cd32345)
2025-04-29 14:13:41 +02:00
Mary Guillemard
390e265643 panvk: Take resource index in valhall_lower_get_ssbo_size
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Previously we were not extracting the resource index from the resource
handle.

This fixes failures with PanVK+ANGLE on "dEQP-GLES31.functional.ssbo.array_length.unsized_*".

Fixes: e4613f8b23 ("panvk: Lower get_ssbo_size() on Valhall")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34697>
(cherry picked from commit 845611bb43)
2025-04-27 19:55:46 +02:00
John Anthony
bca113e890 panvk: Enable VK_EXT_direct_mode_display
Panvk already enables VK_EXT_acquire_xlib_display, but not
VK_EXT_direct_mode_display which is a dependency. This causes a failure
in dEQP-VK.info.instance_extensions.

Fixes: 8c2bfa279d ("panvk: support x11 wsi")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34672>
(cherry picked from commit 8dd578e2a4)
2025-04-27 19:55:46 +02:00
Mary Guillemard
727777ad84 panvk: Take rasterization sample into account in indirect draw on v10+
This has been an oversight when implementing indirect draw.

Fixes: 1f3b8bb918 ("panvk: Add support for Draw[Indexed]Indirect")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34674>
(cherry picked from commit c7f2bc6bed)
2025-04-27 19:55:46 +02:00
Olivia Lee
da841c11d4 panfrost: allow promoting sysval UBO to push constants
We already had a path for sysvals in panfrost_emit_const_buf, but it was
unused because we only allowed pushing the default UBO 0. Improves
glmark2 score on G610 from 3051 to 3071, but mostly we need it as a
prerequisite for dynamic blend constants.

Signed-off-by: Olivia Lee <benjamin.lee@collabora.com>
Fixes: 59a3e12039 ("panfrost: do not push "true" UBOs")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34664>
(cherry picked from commit e93261f579)
2025-04-27 19:55:46 +02:00
Rhys Perry
4cd09c4ebd aco/gfx11: create waitcnt for workgroup vmem barriers
It seems this is necessary on GFX11.

Similar to 576a2e798c

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Backport-to: 25.0
Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34634>
(cherry picked from commit b03e071583)
2025-04-27 11:54:18 +02:00
Lionel Landwerlin
c4587d2c61 anv: use companion batch for operations with HIZ/STC_CCS destination
We're currently crashing a couple of tests :
   dEQP-VK.pipeline.monolithic.depth.xfer_queue_layout.*

   deqp-vk: ../src/intel/blorp/blorp_blit.c:2935:
     blorp_copy: Assertion `blorp_copy_supports_blitter(batch->blorp, src_surf->surf, dst_surf->surf, src_surf->aux_usage, dst_surf->aux_usage)' failed.

Tested on:
  dEQP-VK.api.copy_and_blit.copy_commands2.image_to_image_transfer_queue.all_formats.depth_stencil.*
  dEQP-VK.api.copy_and_blit.multiplanar_xfer.*
  dEQP-VK.pipeline.monolithic.depth.xfer_queue_layout.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 31eeb72e45 ("blorp: Add support for blorp_copy via XY_BLOCK_COPY_BLT")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34023>
(cherry picked from commit e60416b4e4)
2025-04-27 11:54:17 +02:00
Mel Henning
8f0c4ec91d wsi/headless: Override finish_create
Since headless overrides create_mem, it needs to override finish_create
too. Fixes a segfault in nvk that was caused by us mixing
wsi_create_null_image_mem with wsi_finish_create_blit_context, which
would then call CmdCopyImageToBuffer with image->blit.buffer == NULL

Fixes a cts failure on nvk in:
dEQP-VK.image.swapchain_mutable.headless.2d.r8g8b8a8_unorm_b8g8r8a8_unorm_clear_copy_format_list
and several others

Fixes: 579578f10a ("vulkan/wsi/drm: Break create_prime_image in pieces")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34646>
(cherry picked from commit 60452e016e)
2025-04-27 11:54:14 +02:00
Karol Herbst
88d7ecb68b nir_lower_mem_access_bit_sizes: fix negative chunk offsets
With a 64 bit pointer model, instead of doing -1 the pass ended up doing
+4294967295. The reason here was some implicit integer conversion going
horribly wrong, so just do the offset math in 64 bit to get a nice result.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13023
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34669>
(cherry picked from commit 33965bb21b)
2025-04-27 11:54:13 +02:00
Yinjie Yao
d6399f0f0e frontends/va: Handle properly when decoding more slices than limit
For h264/h265/av1/vp9, give warning when application is
sending more slices than allowed by limit, and stop copying
remaining slices to avoid unwanted behaviour.

Cc: mesa-stable
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34633>
(cherry picked from commit eecfb02463)
2025-04-27 11:54:08 +02:00
Ella Stanforth
a46b01a8c9 v3d/compiler: Fixup output types for all 8 outputs
Cc: mesa-stable
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33942>
(cherry picked from commit 1ec0cdb733)
2025-04-27 11:54:04 +02:00
Dmitry Baryshkov
a2d71040f3 meson: disable SIMD blake optimisations on x32 host
On X.org startup libgallium crashes on x32 hosts inside
blake3_hash_many_sse41(), most likely because of the different pointer
size. Disable SIMD blake implementation if x32 is detected.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34453>
(cherry picked from commit b9c6afd3a7)
2025-04-27 11:48:42 +02:00
Eric Engestrom
40cd43d497 .pick_status.json: Update to 3493500abb 2025-04-27 11:48:41 +02:00
José Roberto de Souza
96a3c83d60 intel: Fix the MOCS values in XY_BLOCK_COPY_BLT for Xe2+
Some checks failed
macOS-CI / macOS-CI (dri) (push) Has been cancelled
macOS-CI / macOS-CI (xlib) (push) Has been cancelled
One more instruction were the MOCS value was splited into two
registes.

Cc: mesa-stable
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34592>
(cherry picked from commit fcb6dfb29c)
2025-04-23 12:20:58 +02:00
José Roberto de Souza
f4dd46901a intel: Fix the MOCS values in XY_FAST_COLOR_BLT for Xe2+
Xe2 changed the MOCS field in few instructions, those now have a field
for the MOCS index and other the encryption enable bit but ISL returns
the combination of both aka MEMORY_OBJECT_CONTROL_STATE.

To minimize changes I have added 2 macros to extract the values
from the value returned by isl.

From all the instructions changed Mesa only make use of two, so the
other instruction will be handled in the next patch.

Cc: mesa-stable
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34592>
(cherry picked from commit 161c412a82)
2025-04-23 12:20:58 +02:00
José Roberto de Souza
094e157daa intel: Program XY_FAST_COLOR_BLT::Destination Mocs for gfx12
Copy engine is not used in gfx12 platforms on ANV but that is possible
in Iris.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34560>
(cherry picked from commit a96e280dfe)
2025-04-23 12:20:58 +02:00
Pierre-Eric Pelloux-Prayer
747a79b13f radeonsi: fix potential use after free in si_set_debug_callback
si_destroy_context needs to call context->set_debug_callback(...) to
avoid the debug logs to access the destroyed context.

Adding this change introduced a different problem: when an aux context
is destroyed from si_destroy_screen, parts of the screen have been
freed already: the shader_compiler_queue_*.

c467a87e06 ("radeonsi: Destroy queues before the aux contexts") moved
the util_queue_destroy calls above the context destruction, but with
the 59a3f38ff6 change, it's not needed anymore: si_destroy_context
will finish the screen shader queues before proceeding with releasing,
so use-after-free isn't possible.

Fixes: 59a3f38ff6 ("radeonsi: clear the debug callback on ctx destroy")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12035
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34574>
(cherry picked from commit 2a381bbc3c)
2025-04-23 12:20:58 +02:00
Karol Herbst
80ce5dcae8 rusticl/device: fix panic when disabling 3D image write support
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12985
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34649>
(cherry picked from commit 6f080ac532)
2025-04-23 11:26:50 +02:00
Danylo Piliaiev
42bd3b7907 tu,freedreno: Don't fallback to LINEAR with DRM_FORMAT_MOD_QCOM_COMPRESSED
DRM_FORMAT_MOD_QCOM_COMPRESSED forces the image to be UBWC regardless
of what's better for perf, we should respect that.

The regression is seen in GTK4 when it tries to create tiny swapchain
images.

Fixes: fc50fb35b0
("tu,freedreno: Enable linear mipmap tail for UBWC images")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34628>
(cherry picked from commit 36f22cc951)
2025-04-23 11:26:44 +02:00
Connor Abbott
53480a2fa1 tu: Fix flushing when using a staging buffer for copies
When doing the flushing, I forgot that because the staging buffer can be
used with different formats with different cpp, we need to make sure
that CCU is properly flushed and invalidated between each copy to the
staging buffer to prevent stale cache entries from creeping in, as the
CCU seems to rely on the cpp staying the same, even on a7xx which
dropped some of the other restrictions like using the same RT
index/layer. For "normal" user-visible copies this is done via
transitioning from UNDEFINED.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34611>
(cherry picked from commit ee10938bee)
2025-04-23 11:26:42 +02:00
Mary Guillemard
bc2bf6c1a7 panvk: reset dyn_bufs map count to 0 in create_copy_table
We were forgetting to reset the map count to 0 in case of dyn_bufs in
create_copy_table.

This was causing invalid copy entries to be added to the table causing
invalid copies in most situation with holes in the set definition while
still binding set 0 or at worst an assert to be triggered in
cmd_fill_dyn_bufs.

This fixes "dEQP-GLES3.functional.ubo.*" and
dEQP-GLES31.functional.ubo.*" on PanVK+ANGLE.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: e350c334b6 ("panvk: Extend the descriptor lowering pass to support Valhall")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34652>
(cherry picked from commit 8d2e16cc11)
2025-04-23 11:26:41 +02:00
Georg Lehmann
b623c683fb aco: set opsel_hi to 1 for WMMA
This is ignored by the hardware but LLVM requires it to disassemble GFX12 WMMA.

Cc: mesa-stable
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34396>
(cherry picked from commit b0c8f31600)
2025-04-23 11:26:40 +02:00
Eric Engestrom
e4f1590662 pick-ui: add missing dependency
Somehow I forgot to commit this line 🤦

Fixes: c37a468a8a ("pick-ui: make `Backport-to: 25.0` backport to 25.0 *and more recent release branches*")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34657>
(cherry picked from commit 0a41200f82)
2025-04-23 11:25:29 +02:00
Eric Engestrom
638bf84131 .pick_status.json: Update to 091d52965f 2025-04-23 11:16:08 +02:00
Janne Grunau
b734cf734e venus: virtgpu: Require stable wire format
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
When VMMs do not support VIRTGPU_DRM_CAPSET_VENUS the capset data
remains zeroed. By requiring the stable wire_format_version 1 this can
be detected early without initialising the renderer.

Avoids triggering `assert(capset->supports_blob_id_0);` in debug builds
under such circumstances.

Cc: mesa-stable
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34613>
(cherry picked from commit 3d3ca9b65e)
2025-04-22 19:42:38 +02:00
Yiwei Zhang
a4ae9c2143 venus: fix missing renderer destructions
With failed compatibility check, the created renderer must be destroyed
within vn_instance_init_renderer.

Cc: mesa-stable
Fixes: 25b8f4f714 ("venus: handle device probing properly.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34613>
(cherry picked from commit 2a4675ee9f)
2025-04-22 19:42:37 +02:00
Janne Grunau
fbe61933a1 venus: Do not use instance pointer before NULL check
Fixes: a753f50668 ("venus: break up vn_device.c")
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Janne Grunau <j@jannau.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34613>
(cherry picked from commit 39e4fd98ce)
2025-04-22 19:42:36 +02:00
Tapani Pälli
e84938a428 iris: make sure to not mix compressed vs non-compressed
This commit implements the following requirement:

   "Keep any UMD-recycling of compression-enabled/disabled
    memory separate."

As additional info there are 2 related wa's for the issue:

   Wa_14018443005
   Wa_18038669374

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34499>
(cherry picked from commit 6d70ec449f)
2025-04-22 19:40:49 +02:00
Tapani Pälli
940c2cbbb6 iris: force reallocate on eglCreateImage with GFX >= 20
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34499>
(cherry picked from commit c2a4657862)
2025-04-22 19:40:48 +02:00
Ian Romanick
8e3cae7c78 elk/algebraic: Don't optimize float SEL.CMOD to MOV
Floating point SEL.CMOD may flush denorms to zero. We don't have enough
information at this point in compilation to know whether or not it is
safe to remove that.

Integer SEL or SEL without a conditional modifier is just a fancy
MOV. Those are always safe to eliminate.

See also 3f782cdd25.

Fixes: fab92fa1cb ("i965/fs: Optimize SEL with the same sources into a MOV.")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34192>
(cherry picked from commit e783930b10)
2025-04-22 19:39:44 +02:00
Ian Romanick
9af068c5e0 elk/algebraic: Clear condition modifier on optimized SEL instruction
The condition modifier on SEL means something completely different than
it means on MOV.  On MOV it means to modify the flags based on the value
written to the destination. On SEL it means to compare the sources using
that mode and pick the result (i.e., as min() or max()) without
modifying the flags.

The resulting MOV should not have a condition modifier for the same
reason it (already) doesn't have a predicate. This bug was found by
inspection, so I added a unit test.

Fixes: fab92fa1cb ("i965/fs: Optimize SEL with the same sources into a MOV.")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34192>
(cherry picked from commit f4ede9c10a)
2025-04-22 19:39:22 +02:00
Ian Romanick
ce96dcf1a6 brw/algebraic: Don't optimize float SEL.CMOD to MOV
Floating point SEL.CMOD may flush denorms to zero. We don't have enough
information at this point in compilation to know whether or not it is
safe to remove that.

Integer SEL or SEL without a conditional modifier is just a fancy
MOV. Those are always safe to eliminate.

See also 3f782cdd25.

Fixes: fab92fa1cb ("i965/fs: Optimize SEL with the same sources into a MOV.")

No shader-db changes on any Intel platform.

fossil-db:

All Intel platforms had similar results. (Lunar Lake shown)
Totals:
Instrs: 209903490 -> 209903492 (+0.00%)
Cycle count: 30546025224 -> 30546021980 (-0.00%); split: -0.00%, +0.00%
Max live registers: 65516231 -> 65516235 (+0.00%)

Totals from 2 (0.00% of 706657) affected shaders:
Instrs: 3197 -> 3199 (+0.06%)
Cycle count: 361650 -> 358406 (-0.90%); split: -10.05%, +9.15%
Max live registers: 300 -> 304 (+1.33%)

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34192>
(cherry picked from commit 6a19d8915f)
2025-04-22 19:39:21 +02:00
Ian Romanick
055cbf9836 brw/algebraic: Clear condition modifier on optimized SEL instruction
The condition modifier on SEL means something completely different than
it means on MOV.  On MOV it means to modify the flags based on the value
written to the destination. On SEL it means to compare the sources using
that mode and pick the result (i.e., as min() or max()) without
modifying the flags.

The resulting MOV should not have a condition modifier for the same
reason it (already) doesn't have a predicate. This bug was found by
inspection, so I added a unit test.

No shader-db or shader-db changes on any Intel platform.

Fixes: fab92fa1cb ("i965/fs: Optimize SEL with the same sources into a MOV.")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34192>
(cherry picked from commit 07dc1d4043)
2025-04-22 19:38:28 +02:00
Mel Henning
006af589ee nvk: Override render enable for blits and resolves
Fixes cts tests:

dEQP-VK.conditional_rendering.conditional_ignore.blit_image
dEQP-VK.conditional_rendering.conditional_ignore.blit_image_inverted
dEQP-VK.conditional_rendering.conditional_ignore.resolve_image
dEQP-VK.conditional_rendering.conditional_ignore.resolve_image_inverted

which were introduced in vk-gl-cts commit 4aa277c300

Fixes: 32f2317223 ("nvk: Use meta for doing blits with the 3D hardware")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34644>
(cherry picked from commit 2fc4c98aaf)
2025-04-22 19:37:33 +02:00
Mel Henning
af61891fed nvk: SET_STATISTICS_COUNTER at start of meta_begin
Ideally, begin/end should be roughly symmetric - the initialization
order should be the reverse of the teardown order.

Fixes: 6f85e6b06b ("nvk: Disable statistics around meta ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34644>
(cherry picked from commit 52085f2a0e)
2025-04-22 19:37:32 +02:00
Faith Ekstrand
5f36e5961e nak/sm70: Fix the bit74_75_ar_mod assert
It's used for src2, not src0.

Fixes: 40422927dc ("nak: Pass has_mod to all form of src2 requiring it")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
(cherry picked from commit 47fc468944)
2025-04-22 19:37:11 +02:00
Faith Ekstrand
61b44913f5 nak/legalize: Take a RegFile in copy_alu_src_and_lower_fmod
Otherwise, we'll screw up uniform GPRs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33107>
(cherry picked from commit 22a30bfa4f)
2025-04-22 19:36:01 +02:00
Tomeu Vizoso
70ad887eda etnaviv: Release screen->dummy_desc_reloc.bo
We are currently trying to release twice the same dummy BO, while
leaking the other one.

Fixes: bca5ef70a4 ("etnaviv: split dummy RT backing store from reloc")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34627>
(cherry picked from commit 63251d43ae)
2025-04-22 18:47:28 +02:00
Georg Lehmann
e6134c388d nir/opt_algebraic: disable fsat(a + 1.0) opt if a can be NaN
Foz-DB Navi21:
Totals from 9 (0.01% of 79789) affected shaders:
Instrs: 6782 -> 6796 (+0.21%); split: -0.03%, +0.24%
CodeSize: 40020 -> 40108 (+0.22%); split: -0.04%, +0.26%
Latency: 23764 -> 23758 (-0.03%)
InvThroughput: 6424 -> 6431 (+0.11%); split: -0.08%, +0.19%
SClause: 273 -> 275 (+0.73%)
Copies: 338 -> 339 (+0.30%)
VALU: 5138 -> 5147 (+0.18%); split: -0.06%, +0.23%
SALU: 349 -> 350 (+0.29%)
SMEM: 498 -> 500 (+0.40%)

Fixes: a4a3487aae ("nir/opt_algebraic: optimize patterns from Skia")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34125>
(cherry picked from commit 3e26fc4498)
2025-04-22 18:47:27 +02:00
Yinjie Yao
c72a9e2795 gallium/pipe: Increase hevc max slice to 600
According to the spec, increase max supported slices of hevc to 600.

Cc: mesa-stable
Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34632>
(cherry picked from commit 2b5ca87927)
2025-04-22 18:47:26 +02:00
Eric Engestrom
cdd4f62e89 aco: help clang 20 do some additions and subtractions
clang 20 complains:

    ../src/amd/compiler/aco_assembler.cpp:837:28: error: writing 1 byte into a region of size 0 [-Werror=stringop-overflow=]
      837 |       vaddr[num_vaddr + i] = reg(ctx, instr->operands.back(), 8) + i + 1;
          |       ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    ../src/amd/compiler/aco_assembler.cpp:832:12: note: at offset 5 into destination object ‘vaddr’ of size 5
      832 |    uint8_t vaddr[5] = {0, 0, 0, 0, 0};
          |            ^~~~~
    ../src/amd/compiler/aco_assembler.cpp:837:28: error: writing 1 byte into a region of size 0 [-Werror=stringop-overflow=]
      837 |       vaddr[num_vaddr + i] = reg(ctx, instr->operands.back(), 8) + i + 1;
          |       ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    ../src/amd/compiler/aco_assembler.cpp:832:12: note: at offset 6 into destination object ‘vaddr’ of size 5
      832 |    uint8_t vaddr[5] = {0, 0, 0, 0, 0};
          |            ^~~~~
    ../src/amd/compiler/aco_assembler.cpp:837:28: error: writing 1 byte into a region of size 0 [-Werror=stringop-overflow=]
      837 |       vaddr[num_vaddr + i] = reg(ctx, instr->operands.back(), 8) + i + 1;
          |       ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    ../src/amd/compiler/aco_assembler.cpp:832:12: note: at offset 7 into destination object ‘vaddr’ of size 5
      832 |    uint8_t vaddr[5] = {0, 0, 0, 0, 0};
          |            ^~~~~

But `i < MIN2(instr->operands.back().size() - 1, 5 - num_vaddr)` means `i` is
at most `5 - num_vaddr - 1`, which means `vaddr[num_vaddr + i]` =>
`vaddr[num_vaddr + 5 - num_vaddr - 1]` => `vaddr[5 - 1]` => `vaddr[4]` which
is within the valid indices.

For some reason, using signed `int` instead allows clang to figure this
out, so let's do that since we don't need the extra range.

While at it, use ARRAY_SIZE(vaddr) instead of hard-coding the same `5`
in several places.

Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34625>
(cherry picked from commit 2bcb55f3f6)
2025-04-22 18:47:18 +02:00
Marek Olšák
fec9695e67 radv: fix incorrect patch_outputs_read for TCS with dynamic state
Fixes: 8c2f9f0665 - radv: switch to the new TCS LDS/offchip size computation

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34544>
(cherry picked from commit 4a51089f30)
2025-04-22 18:47:17 +02:00
Rhys Perry
65a50ce376 aco: combine VALU lanemask hazard into VALUMaskWriteHazard
This is now basically the same as the original VALUMaskWriteHazard, except
it now considers both VALU and SALU writes.

Now that it's a part of VALUMaskWriteHazard, differences from the original
VALU lanemask workaround are:
- it includes SALU reads after the write
- it includes VALU writes and SALU/VALU reads after the write which are
  not lanemasks
- it combines s_waitcnt_depctr instructions when it's a read after both a
  SALU write and a VALU write
- non-exec VALU SGPR reads reset the SGPRs read by VALU as a lanemask
- exec SGPRs are ignored

resolve_all_gfx11() is also finished.

fossil-db (navi31):
Totals from 21538 (27.13% of 79377) affected shaders:
Instrs: 27628855 -> 27552972 (-0.27%); split: -0.30%, +0.03%
CodeSize: 145968448 -> 145667616 (-0.21%); split: -0.23%, +0.02%
Latency: 209537805 -> 209509519 (-0.01%); split: -0.02%, +0.00%
InvThroughput: 36304270 -> 36301624 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12623
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11480
Backport-to: 25.0
Backport-to: 25.1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34529>
(cherry picked from commit ce2be5ab8e)
2025-04-22 18:47:10 +02:00
Rhys Perry
2ff09ffbda aco/gfx12: don't use second VALU for VOPD's OPX if there is a WaR
fossil-db (gfx1201):
Totals from 38908 (49.02% of 79377) affected shaders:
Instrs: 30268107 -> 30268131 (+0.00%); split: -0.00%, +0.00%
CodeSize: 180843648 -> 180843640 (-0.00%); split: -0.00%, +0.00%
Latency: 224905962 -> 224906072 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 44322988 -> 44323004 (+0.00%)
VALU: 15124145 -> 15124167 (+0.00%)
VOPD: 4018504 -> 4018482 (-0.00%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 25.0
Backport-to: 25.1
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34246>
(cherry picked from commit 408fa33c09)
2025-04-22 18:47:09 +02:00
Patrick Lerda
a153a481cc mesa_interface: fix legacy dri2 compatibility
These values are shared with xcb/dri2.h, and can't be changed
without breaking the legacy dri2 compatibility. This change
reverses partially the update done by 3b603d1646.

For instance this issue is triggered on dri2 i915 with
"piglit/bin/glx-copy-sub-buffer -auto" or
"piglit/bin/hiz-depth-read-window-stencil0 -auto".

Fixes: 3b603d1646 ("mesa_interface: remove unused stuff")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34561>
(cherry picked from commit 60a31156b0)
2025-04-22 18:47:02 +02:00