Commit graph

46796 commits

Author SHA1 Message Date
Kenneth Graunke
ee2bf3a4b6 i965: Fix assertions about register types for INT DIV in brw_math.
BRW_MATH_FUNCTION_REMAINDER was missing.  Also, it seems worthwhile to
assert that INT DIV's arguments are signed/unsigned integers.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-02 17:01:02 -07:00
Kenneth Graunke
e66fc1cb03 ir_to_mesa: Don't assertion fail on integer modulus.
Drivers implementing GLSL 1.30 want to do integer modulus, and until we
can stop generating code via ir_to_mesa, it's easier to make it silently
generate rubbish code.  Multiply will do.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-02 17:00:00 -07:00
Tom Stellard
d64c6d2ffc r300/compiler: Fix error in OMOD optimization
Classic compiler mistake.  In the example below, the OMOD optimization
was combining instructions 4 and 10, but since there was an instruction
(#8) in between them that wrote to the same registers as instruction 10,
instruction 11 was reading the wrong value.

Example of the mistake:

Before OMOD:
4: MAD temp[0].y, temp[3]._y__, const[0]._x__, const[0]._y__;
...
8: ADD temp[2].x, temp[1].x___, -temp[4].x___;
...
10: MUL temp[2].x, const[1].y___, temp[0].y___;
11: FRC temp[5].x, temp[2].x___;

After OMOD:
4: MAD temp[2].x / 8, temp[3]._y__, const[0]._x__, const[0]._y__;
...
8: ADD temp[2].x, temp[1].x___, -temp[4].x___;
...
11: FRC temp[5].x, temp[2].x___;

https://bugs.freedesktop.org/show_bug.cgi?id=41367
2011-10-02 15:21:15 -07:00
Tom Stellard
13814b0103 r300/compiler: Rewrite source swizzles when using OMOD 2011-10-02 15:21:15 -07:00
Tom Stellard
8b0418e478 r300/compiler: Fix rc_normal_rewrite_writemask()
This function had not been updated to use conversion swizzles.
2011-10-02 15:21:15 -07:00
Tom Stellard
b5ecf5ba46 r300/compiler: Use consistent src swizzles for transcendent instructions
Source swizzles for transcendent instructions were being stored in the X
channel regardless of what channel the instruction was writing.
This was causing problems for some helper functions that were expecting
source swizzles to occupy channels corresponding to the instruction's
writemask.  This commit makes transcendent instructions follow the same
convention as normal instructions for representing source swizzles.

Previous behavior:
LG2 temp[0].y, input[0].x___;

Current behavior:
LG2 temp[0].y, input[0]._x__;
2011-10-02 15:21:15 -07:00
Eric Anholt
e7c2b711a3 mesa: Respect GL_RASTERIZER_DISCARD for various meta-type operations.
From the EXT_transform_feedback spec:

    Primitives can be optionally discarded before rasterization by calling
    Enable and Disable with RASTERIZER_DISCARD_EXT. When enabled, primitives
    are discared right before the rasterization stage, but after the optional
    transform feedback stage. When disabled, primitives are passed through to
    the rasterization stage to be processed normally. RASTERIZER_DISCARD_EXT
    applies to the DrawPixels, CopyPixels, Bitmap, Clear and Accum commands as
    well.

And the GL 3.2 spec says it applies to ClearBuffer* as well.

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-10-01 22:16:07 -07:00
Eric Anholt
3a1ba094f4 mesa: Add missing glGetIntegerv() support for ARB_color_buffer_float tokens.
Fixes piglit ARB_color_buffer_float/api-get

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-01 22:16:07 -07:00
Eric Anholt
42769c2da5 Revert "vbo: Don't discount stride == 0 for testing all varyings in VBOs."
This reverts commit d631c19db4.

The commit was broken, and ended up returning false all the time
because nobody in the world binds every single possible vertex array.
On further reflection, we don't want to discount stride == 0: This
function is just used for deciding to calculate whether to compute the
bonuds on the index, and there's no sense in computing index bounds
when stride == 0.

For the separate question of "how much data do I upload for this
vertex element?", the i965 driver was fixed to upload the data.

Fixes a regression of about 2x in 3DMMES, and most importantly, makes
Hammerfight playable.
2011-10-01 22:16:07 -07:00
Eric Anholt
ddc348d83e i965: Make sure to upload the data for a collection of Stride == 0 arrays.
Commit d631c19db4 avoided this problem
by forcing the driver to get the min/max index, but that commit was
broken, so just fix the driver problem (confusion between "do I need
to upload any data?" and "do I need the index bounds in order to
upload any data?").
2011-10-01 22:16:07 -07:00
Eric Anholt
617cdcd4c7 mesa: Delay s_texcombine.c memory allocation until it's used.
Generally we're using fragment programs in all our drivers, so wasting
4MB for code that's never called is pretty lame.  Reduces i965 memory
allocation for a short shader program from 21,932,128B to 17,737,816B.
2011-10-01 22:16:06 -07:00
Eric Anholt
f7f678331d tnl: Delay results allocation until we actually need them.
Decreases i965 peak memory allocation for a trivial shader program
from 23,483,048B to 21,932,128B, since we never actually use tnl for
rendering.
2011-10-01 22:16:06 -07:00
Ian Romanick
fe006a74f6 i965/vs: Fix swizzle related assertion
As innocuous as it seemed, ebca47a basically broke the world (e.g.,
>200 piglit regressions).  In vec4_visitor::emit_block_move,
src->swizzle was expected to be BRW_SWIZZLE_NOOP before setting it to
a swizzle that would replicate the existing channels of the source
type to a vec4 (e.g., .xyyy for a vec2).

The original assertion seems to have been a little bogus.  In addition
to being BRW_SWIZZLE_NOOP, src->swizzle might already be a swizzle
that would replicate the existing channels of the source type to a
vec4.  In other words, it might already have the value that we're
about to assign to it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2011-10-01 22:16:06 -07:00
Brian Paul
dd9574d7a5 mesa: number of combiner terms to pop depends on GL_NV_texture_env_combine4
If GL_NV_texture_env_combine4 is not supported, setting the fourth
combiner term would generate a GL error.
Of course, I noticed this right after committing the previous patch
to use a loop in the first place.  <sigh>

Note that GL_EXT_texture_env_combine is always supported so the first
three combiner terms are always accepted.
2011-10-01 08:29:34 -06:00
Brian Paul
9520f483b8 mesa: s/INLINE/inline/
INLINE is still seen in some files (some generated files, etc) but this
is a good start.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-01 08:16:36 -06:00
Brian Paul
c707ffa587 r600: include version.h for _mesa_override_glsl_version() prototype
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-01 08:16:00 -06:00
Brian Paul
b15ab1d228 mesa: use !! to simplify some _mesa_set_enable() calls in attrib.c
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-01 08:15:47 -06:00
Brian Paul
986a9bb180 mesa: use loop in pop_texture_group() to restore 4 combiner terms
There's four combiner terms (not 3) with GL_NV_texture_env_combine4.
Use a loop to make the code a little more compact.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-10-01 08:15:28 -06:00
Ian Romanick
1f8f8aef7f mesa: Refactor hash_table_{find,remove} to share some code
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-30 15:37:00 -07:00
Ian Romanick
16f7bdf555 mesa: Document an odd side-effect of hash_table_insert
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-30 15:37:00 -07:00
Ian Romanick
cd76f114e6 mesa: Remove unused field gl_program::Varying
Lots of things set and copy this field around, but nothing uses it.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-30 15:37:00 -07:00
Ian Romanick
a9f25160af mesa: Use Add linker_error instead of fail_link
See also 8aadd89.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2011-09-30 15:37:00 -07:00
Marek Olšák
aae342cff0 r600g: fix a compiler warning 2011-09-30 23:20:27 +02:00
Marek Olšák
74d6f929b4 gallium/docs: update the documentation of capabilities
Still like 13 caps are undocumented.
2011-09-30 23:20:21 +02:00
Marek Olšák
bf0baa7717 r600g: move all files from winsys/r600 into drivers/r600
Be sure to reconfigure after this commit.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
363ff84475 winsys/radeon: move GEM domains out of the drivers into winsys
The drivers don't need to care about the domains. All they need to set
are the bind and usage flags. This simplifies the winsys too.

This also fixes on r600g:
- fbo-depth-GL_DEPTH_COMPONENT32F-copypixels
- fbo-depth-GL_DEPTH_COMPONENT16-copypixels
- fbo-depth-GL_DEPTH_COMPONENT24-copypixels
- fbo-depth-GL_DEPTH_COMPONENT32-copypixels
- fbo-depth-GL_DEPTH24_STENCIL8-copypixels
I can't explain it.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
af8eb5c851 winsys/radeon: remove a redundant parameter 'size' from buffer_from_handle
It's part of pb_buffer already.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
90ce3cdde9 r600g: remove struct radeon (or what's left of it)
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
518557d74a r600g: move family and chip_class from struct radeon to r600_screen
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
6101b6d442 r600g: merge r600_bo with r600_resource
I have moved 'last_flush' and 'binding' from r600_bo to winsys/radeon.
The other members are now part of r600_resource.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
ba89086e79 gallium: add PIPE_CAP_TEXTURE_BARRIER
Same issue as with conditional_render.

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
3d13b081c7 gallium: add PIPE_CAP_CONDITIONAL_RENDER
We were checking whether render_condition is set. That was not reliable,
because it's always set with trace and noop regardless of driver support.

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
f5bfe54a34 gallium: add and use PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
This removes:
- PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
- PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS
in favor of the that new per-shader cap.

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-09-30 23:19:52 +02:00
Marek Olšák
557c3febdf gallium: remove PIPE_CAP_TEXTURE_MIRROR_REPEAT
All drivers support it (well, except Cell). The boolean option is going away
from core Mesa too.

This is a follow-up to Ian Romanick's patch
"mesa: Remove ARB_texture_mirrored_repeat extension enable flag".

Reviewed-by: Brian Paul <brianp@vmware.com>
2011-09-30 23:19:52 +02:00
Chris Wilson
67582e6eef i915: out-of-bounds write in calc_live_regs()
From a Coverity defect report.

src/mesa/drivers/dri/i915/i915_fragprog.c
   301  /*
   302   * TODO: consider moving this into core
   303   */
   304  static bool calc_live_regs( struct i915_fragment_program *p )
   305  {
   306      const struct gl_fragment_program *program = &p->FragProg;
   307      GLuint regsUsed = 0xffff0000;
-> 308      uint8_t live_components[16] = { 0, };
   309      GLint i;
   310
   311      for (i = program->Base.NumInstructions - 1; i >= 0; i--) {
   312          struct prog_instruction *inst =
&program->Base.Instructions[i];
   313          int opArgs = _mesa_num_inst_src_regs(inst->Opcode);
   314          int a;
   315
   316          /* Register is written to: unmark as live for this and
preceeding ops */
   317          if (inst->DstReg.File == PROGRAM_TEMPORARY) {
-> 318              if (inst->DstReg.Index > 16)
   319                 return false;
   320
-> 321              live_components[inst->DstReg.Index] &= ~inst->DstReg.WriteMask;
   322              if (live_components[inst->DstReg.Index] == 0)
   323                  regsUsed &= ~(1 << inst->DstReg.Index);
   324          }
   325
   326          for (a = 0; a < opArgs; a++) {
   327              /* Register is read from: mark as live for this and preceeding ops */
   328              if (inst->SrcReg[a].File == PROGRAM_TEMPORARY) {
   329                  unsigned c;
   330
   331                  if (inst->SrcReg[a].Index > 16)
   332                     return false;
   333
   334                  regsUsed |= 1 << inst->SrcReg[a].Index;
   335
   336                  for (c = 0; c < 4; c++) {
   337                      const unsigned field = GET_SWZ(inst->SrcReg[a].Swizzle, c);
   338
   339                      if (field <= SWIZZLE_W)
   340                          live_components[inst->SrcReg[a].Index] |= (1U << field);
   341                  }
   342              }
   343          }
   344
   345          p->usedRegs[i] = regsUsed;
   346      }

Reported-by: Vinson Lee <vlee@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40022
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-30 22:12:45 +01:00
Chris Wilson
ebca47af85 i965: Assign instead of compare inside assert
This is from a Coverity defect report.

src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
  1314  void
  1315  vec4_visitor::emit_block_move(dst_reg *dst, src_reg *src,
  1316                                const struct glsl_type *type, bool
predicated)
...
  1351     /* Do we need to worry about swizzling a swizzle? */
->1352     assert(src->swizzle = BRW_SWIZZLE_NOOP);
  1353     src->swizzle = swizzle_for_size(type->vector_elements);

Reported-by: Vinson Lee <vlee@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40158
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-30 22:00:05 +01:00
Chris Wilson
8ccbcda5c6 i965/gen6: Fix assign instead of compare in assert
This is from a Coverity defect report.

src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
   268  static void
   269  check_gen6_math_src_arg(struct brw_reg src)
   270  {
   271     /* Source swizzles are ignored. */
   272     assert(!src.abs);
   273     assert(!src.negate);
-> 274     assert(src.dw1.bits.swizzle = BRW_SWIZZLE_XYZW);
   275  }

Reported-by: Vinson Lee <vlee@vmware.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40214
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-09-30 21:49:29 +01:00
Carl Worth
201485bae0 glcpp: Add a test for #elif with an undefined macro.
As written, this test correctly raises an error for #elif being used
with an undefined macro (and not as an argument to "defined"). If the
preceding #if were '#if 1' then this diagnositc would correctly be
hidden. That allows code such as the following to not raise an error:

	#ifndef MAYBE_UNDEFINED
	#elif MAYBE_UNDEFINED < 5
	...
	#endif

So this test case is working as expected already. We add it here just
to improve test coverage.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:44:21 -07:00
Carl Worth
c4aaf7943c glcpp: Raise error if defining any macro containing two consecutive underscores
The specification reserves any macro name containing two consecutive
underscores, (anywhere within the name). Previously, we only raised
this error for macro names that started with two underscores.

Fix the implementation to check for two underscores anywhere, and also
update the corresponding 086-reserved-macro-names test.

This also fixes the following two piglit tests:

	spec/glsl-1.30/preprocessor/reserved/double-underscore-02.frag
	spec/glsl-1.30/preprocessor/reserved/double-underscore-03.frag

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:44:16 -07:00
Carl Worth
28842c2331 glcpp: Implement token pasting for non-function-like macros
This is as simple as abstracting one existing block of code into a
function call and then adding a single call to that function for the
case of a non-function-like macro.

This fixes the recently-added 097-paste-with-non-function-macro test
as well as the following piglit tests:

	spec/glsl-1.30/preprocessor/concat/concat-01.frag
	spec/glsl-1.30/preprocessor/concat/concat-02.frag

Also, the concat-04.frag test now passes for the right reason. The
test is intended to fail the compilation, but before this commit it
was failing compilation (and hence passing the test) for the wrong
reason.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:44:10 -07:00
Carl Worth
7bb3403e01 glcpp: Test a non-function-like macro using the token paste operator
Apparently we never implemented this, (but we've got a GLSL 1.30 test
in piglit that is exercising this case).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:44:04 -07:00
Carl Worth
3c01a58944 glcpp: Fix two (or more) successive applications of token pasting
There was already a loop here to look for multiple token pastes, but
it was mistakenly incrementing the iterator counter after performing
one paste.

Instead, leave the loop iterator in place to coalesce as many tokens
as necessary into one.

This fixes the recently add 096-paste-twice test as well as the
following piglit test:

	spec/glsl-1.30/preprocessor/concat/concat-03.frag

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:43:59 -07:00
Carl Worth
8e6b99e7b1 glcpp: Add a test for a macro that implements token pasting twice.
This is something that piglit is exercising that currently fails.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Carl Worth <cworth@cworth.org>
2011-09-30 11:43:40 -07:00
Chad Versace
9c72b729f3 mesa: Remove unused tnl items from dd_functions
Remove NeedValidate and ValidateTnlModule.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chad Versace <chad@chad-versace.us>
2011-09-30 11:15:46 -07:00
Brian Paul
a8ca786ba6 meta: fix GetTexImage() for luminance, l/a, intensity formats
The GL spec says that luminance values are returned as (l, 0, 0, 1),
L/A values as (l, 0, 0, a) and intensity values as (i, 0, 0, 1).
Use the pixel transfer scale controls to implement that.
This fixes a few failures in the new piglit getteximage-formats
test when getting a compressed L or L/A image.
2011-09-30 08:16:34 -06:00
Brian Paul
57169c4694 mesa: add _NEW_CURRENT_ATTRIB in _mesa_program_state_flags()
If color material mode is enabled, constant buffer entries related
to the material coefficients will depend on glColor.  So add
_NEW_CURRENT_ATTRIB to the bitset returned for material-related
constants in _mesa_program_state_flags().

This fixes a bug exercised by the new piglit draw-arrays-colormaterial
test.

Note: This is a candidate for the 7.11 branch.
2011-09-30 08:16:21 -06:00
Brian Paul
4e6bb0774f st/mesa: implement AllocTextureImageBuffer() driver hook
This hasn't been needed so far since none of the core Mesa code paths
that call ctx->Driver.AllocTextureImageBuffer() are used with the
state tracker.  That will change in upcoming patches.
Note that this function duplicates some code seen in the st_TexImage()
function.  That can be cleaned up later.
2011-09-30 08:15:30 -06:00
Brian Paul
4368a65767 mesa: simplify parameters to GetTexImage() driver hook
The target, level and texObj can be obtained through the texImage
parameter.  We could make similar changes for the TexImage() hooks too.

Reviewed-by: Eric Anholt <eric@anholt.net>
2011-09-30 08:15:30 -06:00
Thomas Hellstrom
d742a64909 xorg/vmwgfx: Kill this target. It's not used anymore.
This fixes a build error introduced with commit
"winsys/svga: Update to vmwgfx kernel module 2.1"
if both the svga driver and the xorg state tracker was enabled
at the same time.

If needed we can re-add a minimal target for basic functionality.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2011-09-30 09:30:59 +02:00
Brian Paul
e4394fb19f intel: include version.h to get _mesa_override_glsl_version() prototype 2011-09-29 16:29:30 -06:00