Commit graph

3576 commits

Author SHA1 Message Date
Eric Anholt
eda3e4e055 nir/builder: Add a name format arg to nir_builder_init_simple_shader().
This cleans up a bunch of gross sprintfs and keeps the caller from needing
to remember to ralloc_strdup.  I added a couple of '"%s", name ? name :
""' to radv where I didn't fully trace through whether a non-null name was
being passed in.

I also took the liberty of adding a basic name to a few shaders (pan_blit,
unit tests)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:50:29 -08:00
Eric Anholt
5f992802f5 nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader().
This looks a lot more simple now!

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:50:29 -08:00
Eric Anholt
4e9328e3b6 nir_builder: Return a new builder from nir_builder_init_simple_shader().
It's a little inline function, so we can just RAII it for better
ergonomics.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
2020-11-11 08:49:49 -08:00
Jason Ekstrand
2c4b47184d nir/lower_bit_size: Pass a nir_instr to the callback
This way we can start supporting more than just ALU ops.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7482>
2020-11-09 18:58:51 +00:00
Rhys Perry
86ef139bf4 radv: implement VK_EXT_shader_image_atomic_int64
The extension is only exposed on ACO and LLVM 11+ because of a LLVM bug.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7234>
2020-11-09 18:28:59 +00:00
Bas Nieuwenhuizen
1675c83a4f radv: Fix exporting/importing multisample images.
Otherwise FMASK metadata segfaults and on import we disable it ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7358>
2020-11-09 12:44:54 +00:00
Bas Nieuwenhuizen
91f9bc18e0 radv: Fix budget calculations with large BAR.
If we don't have a non-visible VRAM heap, we should be counting
our non-visible VRAM allocations to the visible-VRAM heap.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
2020-11-07 21:56:00 +01:00
Bas Nieuwenhuizen
9948ead3cd radv: Skip tiny non-visible VRAM heap.
When I enable "Above 4G decoding" in my BIOS I still get 16 MiB of
non-visible VRAM on my 8G VRAM GPU ...

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6827>
2020-11-07 21:55:55 +01:00
Rhys Perry
786828131a aco: implement 8/16-bit instructions which can be trivially widened
When nir_lower_bit_size becomes more capable, we might want to revert some
of this.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
SGPRs: 11320 -> 10200 (-9.89%)
VGPRs: 7156 -> 7364 (+2.91%)
CodeSize: 1453948 -> 1430136 (-1.64%); split: -1.66%, +0.02%
Instrs: 258530 -> 254840 (-1.43%); split: -1.44%, +0.01%
Cycles: 37334360 -> 37247936 (-0.23%); split: -0.26%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
2020-11-04 11:50:37 +00:00
Rhys Perry
ef95ba8cdd aco: implement some 16-bit arithmetic instead of lowering
fossil-db (parallel-rdp, Navi):
Totals from 210 (30.75% of 683) affected shaders:
SGPRs: 9704 -> 10248 (+5.61%)
VGPRs: 5884 -> 5368 (-8.77%)
CodeSize: 1155564 -> 1098752 (-4.92%)
Instrs: 199927 -> 189940 (-5.00%)
Cycles: 20438392 -> 19860124 (-2.83%)

v2: use divergence analysis to determine which instructions to lower.

Co-Authored-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
2020-11-04 11:50:37 +00:00
Rhys Perry
8ed7cad75f radv: rework nir_lower_bit_size callback and run DA on GFX8+
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
2020-11-04 11:50:37 +00:00
Rhys Perry
b2ce7da149 radv: do nir_lower_bit_size after algebraic optimizations
There are too many algebraic optimizations to be certain that one of them
couldn't create instructions which need lowering. It also creates better
code for some reason.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
VGPRs: 7716 -> 7672 (-0.57%)
CodeSize: 1516152 -> 1510688 (-0.36%); split: -0.38%, +0.02%
MaxWaves: 3964 -> 3982 (+0.45%)
Instrs: 269445 -> 268508 (-0.35%); split: -0.36%, +0.02%
Cycles: 37963416 -> 37912592 (-0.13%); split: -0.15%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
2020-11-04 11:50:37 +00:00
Rhys Perry
c77114967f radv: move a few passes to after load/store vectorization
load/store vectorization can create 8/16-bit alu to do packing/unpacking,
which would make shader_info::bit_sizes_used out of date.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
2020-11-04 11:50:37 +00:00
Jason Ekstrand
3cc58e6470 nir: Add and use some deref mode helpers
NIR derefs currently have exactly one variable mode.  This is about to
change so we can handle OpenCL generic pointers.  In order to transition
safely, we need to audit every deref->mode check.  This commit adds a
set of helpers that provide more nuanced mode checks and converts most
of NIR to use them.

For simple cases, we add nir_deref_mode_is and nir_deref_mode_is_one_of
helpers.  These can be used in passes which don't have to bother with
generic pointers and just want to know what mode a thing is.  If the
pass ever encounters generic pointers in a way that this check would be
unsafe, it will assert-fail to alert developers that they need to think
harder about things and fix the pass.

For more complex passes which require a more nuanced understanding of
modes, we add nir_deref_mode_may_be and nir_deref_mode_must_be helpers
which accurately describe the compiler's best knowledge about the given
deref.  Unfortunately, we may not be able to exactly identify the mode
in a generic pointers scenario so we have to be very careful when we use
these.  Conversion of these passes is left to later commits.

For the case of mass lowering of a particular mode (nir_lower_explicit_io
is one good example), we add nir_deref_mode_is_in_set.  This is also
pretty assert-happy like nir_deref_mode_is but is for a set containment
comparison on deref modes where you expect the deref to either be all-in
or all-out.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6332>
2020-11-03 22:18:28 +00:00
James Park
bfa9fd88fc radv,radv/winsys: Move RADV_MAX_IBS_PER_SUBMIT
RADV_MAX_IBS_PER_SUBMIT needs to be defined even for the null driver.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7394>
2020-11-03 15:50:38 +00:00
Rhys Perry
ac65d3b6b8 radv: fix shader caching with NaN fixup workaround
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6f21995f98 ("radv: add new drirc option radv_enable_mrt_output_nan_fixup")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7423>
2020-11-03 11:27:31 +00:00
Rhys Perry
36f62494ec radv: fix shader caching with discard->demote workaround
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: bdd7587414 ("radv: use nir_lower_discard_to_demote to work around game bugs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7423>
2020-11-03 11:27:31 +00:00
Rhys Perry
19f3911cf8 radv: add some missing radv_{start,stop}_feedback
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7339>
2020-11-03 11:10:01 +00:00
Samuel Pitoiset
03f260cb27 radv,aco: optimize computing the sample mask for per-sample shading
I don't know why these values were introduced for but it seems like
we can optimize this by just doing:

gl_SampleMaskIn[0] = (SampleCoverage & (1 << gl_SampleID))

AMDGPU-PRO and AMDVLK apply the same formula to compute the
sample mask when per-sample shading is enabled.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7377>
2020-11-02 08:05:47 +01:00
Samuel Pitoiset
c63bcda22c radv,aco: adjust the sample mask only if per-sample shading is enabled
When per-sample shading isn't enabled, we can just load the
samplemask from the hardware which is always the coverage of
the entire pixel/fragment.

fossilds-db (VEGA10):
Totals from 131 (0.10% of 136546) affected shaders:
SGPRs: 5056 -> 5048 (-0.16%)
VGPRs: 2600 -> 2372 (-8.77%)
CodeSize: 115788 -> 112560 (-2.79%)
MaxWaves: 1266 -> 1274 (+0.63%)
Instrs: 20620 -> 20071 (-2.66%)
Cycles: 82416 -> 80220 (-2.66%)
VMEM: 51567 -> 35532 (-31.10%); split: +0.24%, -31.34%
SMEM: 8952 -> 8258 (-7.75%); split: +0.11%, -7.86%
SClause: 1223 -> 1199 (-1.96%); split: -2.62%, +0.65%
Copies: 1247 -> 1124 (-9.86%); split: -10.18%, +0.32%
PreVGPRs: 2112 -> 1981 (-6.20%)

Helps Britannia, Shadow of the Tomb Raider, Warhammer II and Control.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7377>
2020-11-02 08:05:43 +01:00
Bas Nieuwenhuizen
8943c80c9b radv: Fix variable name collision.
idx was aliased, and eb104e949e started
using the outer var in the inner scope ...

Fixes: eb104e949e
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3701
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7388>
2020-10-30 23:44:48 +01:00
Daniel Schürmann
fef8a4befd radv: remove call to nir_lower_pack()
The pack_* instructions are now lowered via nir_lower_alu_to_scalar()
and unpack_* are not lowered anymore.

These bitcasts are no-ops, and lowering prevents
some optimizations like vectorization.

Note: There are still some *_split variations remaining
from different other NIR passes.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6527>
2020-10-28 10:14:26 +00:00
Daniel Schürmann
212be2a04e radv: lower pack_[64/32]_* via nir_lower_alu_to_scalar()
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6527>
2020-10-28 10:14:26 +00:00
Bas Nieuwenhuizen
eb104e949e radv: Do not access set layout during vkCmdBindDescriptorSets.
The spec says:

"
VkDescriptorSetLayout objects may be accessed by commands that operate on descriptor sets allocated using that layout
"

So our behavior is valid here, but this is a temporary workaround for an issue with Baldur's Gate 3.

CC: mesa-stable
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7207>
2020-10-28 03:06:20 +00:00
Bas Nieuwenhuizen
29999e6b9d radv: Fix 1D compressed mipmaps on GFX9.
Partial rollback as GFX9 really requires height = 1 to work.

The two substantial parts of the fix remaining:

1) Deal with views with multiple levels.
2) Limit the expansion to the base mip pitch/height. On GFX9 this
   is exactly equal to the surf_pitch that was used before. I've
   done some investigation to make sure that on GFX10 this always
   results in the right physical layout.

Remaining stupid question is how the actual extents for bounds
checking never end up too low when the size gets clamped, but
this change and the previous change don't change that ...

Fixes: 1fb3e1fb70 "radv: Fix mipmap extent adjustment on GFX9+."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7245>
2020-10-28 00:31:04 +00:00
Vinson Lee
fdb1997ab5 Fix VMware capitalization.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7260>
2020-10-27 15:33:40 -07:00
James Park
328a350387 vulkan/util,vulkan/wsi,radv: Add typed outarray API
MSVC cannot perform GCC __typeof__ for C code. (C++ has decltype.)

Add adjacent functions to allow specifying types manually.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7270>
2020-10-27 08:47:52 -07:00
Samuel Pitoiset
79347f5cd4 radv: enable VK_AMD_mixed_attachment_samples on GFX6-GFX7
Now that dEQP-VK.pipeline.multisample.mixed_attachment_samples.* pass,
it should be safe to also enable this extension on these old chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4913>
2020-10-27 14:13:50 +00:00
Samuel Pitoiset
ee1d30ab8a radv: flush CB before and after FMASK_DECOMPRESS or DCC_DECOMPRESS
According to RadeonSI and AMDVLK, it seems required to flush CB
before and after FMASK_DECOMPRESS or DCC_DECOMPRESS.

This shouldn't much affect performance because the driver already
flushes CB after these operations (including FCE too).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4913>
2020-10-27 14:13:50 +00:00
Samuel Pitoiset
48e83f7665 radv: do not perform a FMASK expand for non-writeable MSAA images
It should only be required for writeable MSAA images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7292>
2020-10-27 13:16:50 +01:00
Marek Olšák
989cc76f0c amd: replace 0x028848 with the register definition
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7264>
2020-10-23 20:51:22 -04:00
Samuel Pitoiset
33c9d4bf31 radv: replace RADV_TRACE_FILE by RADV_DEBUG=hang
The trace file will be dumped as part of the hang report into
$HOME/radv_dumps_<pid>/trace.log if a GPU hang is detected.

The old and famous RADV_TRACE_FILE envvar is now deprecated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
9516f9369e radv: re-order GPU hang report dumps by usefulness
In case the GPU recover, it's probably better to dump useful info
first.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
719b9b3e27 radv: dump GPU hang report logs into $HOME/radv_dumps_<pid>
This creates a directory and save various logs (dmesg, umr,
pipeline, gpu info, etc) instead of printing stuff to stdout/stderr.

This dumps the following files when a GPU hang is detected:
- dmesg.log
- gpu_info.lo
- options.log
- pipeline.log (shaders including SPIR-V if spirv-dis found)
- registers.log
- trace.log
- vm_fault (if a VM fault is detected)
- umr_ring.log (if UMR found)
- umr_waves.log (if UMR found)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
ef6d374307 radv: dump UMR ring and waves into the hang report
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3620
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
18477241c1 radv: add radv_dump_cmd() helper
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
bf66bbda80 ac: add an option to dump GPU info to a file
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
2020-10-23 07:35:00 +00:00
Samuel Pitoiset
eb6877d3af radv,aco: fix use of texop_samples_identical in the resolve meta path
The return value of this texture intrinsic should be a NIR 1-bit bool.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7236>
2020-10-21 13:06:53 +02:00
Bas Nieuwenhuizen
e7ce74497e radv: Advertise VK_KHR_shader_terminate_invocation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7226>
2020-10-20 22:53:08 +00:00
Samuel Pitoiset
4ca1030774 radv: move all NIR pass outside of ACO
This has several advantages:
- it generates roughly the same NIR for both compiler backends
  (this might help for debugging purposes)
- it might allow to move around some NIR pass to improve compile time
- it might help for RadeonSI support
- it improves fossils-db stats for RADV/LLVM (this shouldn't matter
  much but it's a win for free)

fossil-db (Navi/LLVM):
Totals from 80732 (59.18% of 136420) affected shaders:
SGPRs: 5390036 -> 5382843 (-0.13%); split: -3.38%, +3.24%
VGPRs: 3910932 -> 3890320 (-0.53%); split: -2.38%, +1.85%
SpillSGPRs: 319212 -> 283149 (-11.30%); split: -17.69%, +6.39%
SpillVGPRs: 14668 -> 14324 (-2.35%); split: -7.53%, +5.18%
CodeSize: 265360860 -> 267572132 (+0.83%); split: -0.47%, +1.30%
Scratch: 5338112 -> 6134784 (+14.92%); split: -2.65%, +17.57%
MaxWaves: 1077230 -> 1086902 (+0.90%); split: +2.79%, -1.90%

No fossils-db changes on RADV/ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7077>
2020-10-20 10:21:39 +00:00
Marek Olšák
e690a1b78b ac/llvm: don't lower bool to int32, switch to native i1 bool
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7077>
2020-10-20 10:21:39 +00:00
Samuel Pitoiset
6d32fcaaaf Revert "radv/aco: disable NGG GS support because it randomly hangs the GPU"
This reverts commit b84d1a0c42.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7213>
2020-10-20 07:11:29 +00:00
Samuel Pitoiset
07fae31e8c radv: add missing 'discardtodemote' option in the debug list
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7220>
2020-10-20 08:43:54 +02:00
Samuel Pitoiset
72799886e7 radv: report latest extension spec versions
Found with the vulkan extension checker tool.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7158>
2020-10-19 17:52:05 +00:00
James Park
af8d488ea5 util,ac,aco,radv: Cross-platform memstream API
POSIX memstream is not available on Windows.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7143>
2020-10-19 03:37:42 -07:00
James Park
4c2e7b0893 util,radv,radv/winsys: Cross-platform rwlock API
POSIX rwlock is not available on Windows.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7144>
2020-10-19 09:49:33 +00:00
Samuel Pitoiset
bb00a6860e radv: fix optimizing needed states if some are marked as dynamic
From the Vulkan spec 1.2.157:

    "VK_DYNAMIC_STATE_STENCIL_TEST_ENABLE_EXT specifies that the
     stencilTestEnable state in VkPipelineDepthStencilStateCreateInfo
     will be ignored and must be set dynamically with
     vkCmdSetStencilTestEnableEXT before any draw call."

So, stencilTestEnable should be ignored if dynamic. While we are
at it, fix depthBoundsTestEnable too.

Cc: 20.2
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3633
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7112>
2020-10-14 17:13:29 +00:00
Daniel Schürmann
2f125908b3 radv,aco: lower_pack_half_2x16
This patch also optimizes pack_half_2x16(a, 0.0).

Totals from 1949 (1.43% of 136546) affected shaders (RAVEN):
SGPRs: 83376 -> 83336 (-0.05%)
CodeSize: 3532144 -> 3512352 (-0.56%)
Instrs: 660746 -> 660682 (-0.01%); split: -0.01%, +0.00%
Cycles: 6780716 -> 6780472 (-0.00%); split: -0.00%, +0.00%
VMEM: 990886 -> 990883 (-0.00%); split: +0.00%, -0.00%
SMEM: 150506 -> 150538 (+0.02%); split: +0.05%, -0.03%
SClause: 30595 -> 30594 (-0.00%); split: -0.01%, +0.00%
Copies: 40801 -> 40729 (-0.18%)
PreSGPRs: 52335 -> 52341 (+0.01%); split: -0.03%, +0.04%
PreVGPRs: 45104 -> 45097 (-0.02%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6777>
2020-10-14 15:31:38 +00:00
Samuel Pitoiset
e3e8d13ada radv: move compiler statistics to ACO
They are really specific to ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7061>
2020-10-14 15:09:34 +00:00
Samuel Pitoiset
48b988e35f radv: fix ignoring the vertex attribute stride if set as dynamic
The vertex attribute stride should be ignored, so make sure it's
initialized to zero if dynamic to avoid computing a wrong offset.

The fact that each element of pStrides must be greater than or equal
to the maximum extent of all vertex input attributes fetched saves us
one user SGPR for the dynamic stride.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3627
Cc: 20.2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7101>
2020-10-14 12:29:39 +00:00