Commit graph

52448 commits

Author SHA1 Message Date
Rob Herring (Arm)
ed2c19a411 ethosu: Store ethosu_tensor struct ptr in feature map
Some of the tensor info is needed at various points during lowering.
Instead of storing the tensor index and looking it up every time, store
a point to the tensor struct instead.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39975>
2026-04-24 09:22:10 +00:00
Rob Herring (Arm)
915cd57c08 ethosu: Add a common initializer for struct ethosu_operation
The struct ethosu_operation structure has the same initialization in
multiple ops. More ops with the same duplication are about to be added.
Move this out to a common initializer function.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39975>
2026-04-24 09:22:09 +00:00
Rob Herring (Arm)
76ad93bf93 ethosu: Make quantization shift signed
The vela compiler defines shift as signed and some upcoming LUT code
allows for negative shifts, so make shift signed everywhere.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39975>
2026-04-24 09:22:09 +00:00
Dave Airlie
3f5d54ab8c nouveau: drop sector promotion.
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Just like the fix for nvk, just drop this in the GL driver as well.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41143>
2026-04-24 04:20:10 +00:00
Virgile Bello
50ab52f135 microsoft/compiler, d3d12: preserve TCS outputs and pad TES inputs for cross-stage signature matching
Four linked D3D12 pipeline-validation problems with GLSL TCS on DXIL:

1) dxil_nir_kill_unused_outputs killed TCS outputs read back by the
   patch-constant function after a barrier, zeroing the tess factors.
   Keep shader_out locations with any intra-shader load_deref live
   regardless of next_stage_read_mask.

2) is_dead_in_variable dropped TES padding placeholders (no local
   uses) in nir_remove_dead_variables. Also honor
   prev_stage_written_mask so padded TES inputs stay alive.

3) Preserving (1) leaves HS with outputs the DS doesn't declare,
   breaking pipeline validation (e.g. piglit's barrier.shader_test).
   Add dxil_nir_pad_tes_input_signature, called from both link paths,
   to synthesize matching TES inputs (reusing each TCS output's type
   so sig shape and stride match byte-for-byte) plus the tess-level
   inputs -- subsuming the tess-level-only block previously in
   dxil_spirv_nir_link. Scope the per-variable padding to TCS
   outputs that TCS itself reads back via load_deref: outputs that
   neither TES nor TCS consumes get killed from the HS signature,
   so padding them into DS would make the DS input signature longer
   than HS output and break validation for SSO pipelines whose TCS
   declares unused per-patch writes (arb_separate_shader_objects/
   mix-and-match-tcs-tes).

4) remove_hs_intrinsics rewrote load_output but not
   load_per_vertex_output in HS main. With (1) keeping outputs alive,
   GLSL reads of outputs in main whose result survives DCE (UAV
   atomics, non-tess per-vertex output writes) left
   LoadOutputControlPoint in the control-point function, which dxil.dll
   rejects outside the PCF (CreatePipelineState then fails with
   E_INVALIDARG). Treat load_per_vertex_output like load_output.

Validated on piglit arb_tessellation_shader/execution (WARP + DXC
1.8.2403): barrier now passes; the previously-crashing
tcs-output-unmatched and variable-indexing/tcs-output-array-* fail
gracefully matching baseline; isoline/isoline-no-tcs remain flakes
(pre-existing canary corruption, unrelated).

d3d12-quick_shader.txt drops barrier; d3d12-flakes.txt adds
isoline-no-tcs alongside isoline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41028>
2026-04-23 18:45:01 +00:00
Virgile Bello
1d923fdd2b microsoft/compiler, d3d12: flip tess winding at caller, not in nir_to_dxil
get_tessellator_output_primitive used to unconditionally invert CW<->CCW
on the assumption the input was GL-origin (lower-left). That was wrong
for any upper-left caller — including spirv_to_dxil, whose SPIR-V sources
(DXC, glslang) already align with D3D winding.

Make nir_to_dxil copy info.tess.ccw through and expect upper-left. The
d3d12 gallium driver (GL) flips before the conversion to preserve its
output. spirv_to_dxil and dozen (Vulkan, UPPER_LEFT default) are unchanged.

Assisted-by: Claude Opus 4.7 <noreply@anthropic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41028>
2026-04-23 18:45:01 +00:00
Valentine Burley
4e4207e639 zink/ci: Remove Cezanne job
The devices will be repurposed for a different job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41099>
2026-04-23 07:34:03 +00:00
jinmiliu
809bf45c12 radeonsi: enable protected context support for Android
Enable protected context capability for Android
when TMZ support is available. This is needed for Widevine L1 secure
video playback on Android, which requires a protected context.

Signed-off-by: jinmiliu <jinming.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40980>
2026-04-23 05:23:57 +00:00
Qiang Yu
b41cd59790 ac,radeonsi,radv: use V_581A_* engine sel for non-pws acquire_mem packet
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V_581B_PFP and V_581B_ME is for pws acquire_mem. Current code
does not cause any problem because we won't pass engine arg
directly to acqure_mem packet. But use a native V_581A_* arg
for better coding.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41069>
2026-04-23 02:48:06 +00:00
Qiang Yu
89c1bf34ed ac,radeonsi,radv: fix print IB assertion fail for reserved fields
New IB print will assert reserved packet field to be zero.

Fixes: 1c75cd958f ("ac: enable the new auto-generated CP packet parser")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41069>
2026-04-23 02:48:06 +00:00
GKraats
686266d2f1 crocus: Fix shader precompilation on Gen6 and higher
By default crocus precompiles shaders, to avoid stuttering at screens,
caused by compiling shaders at the drawing phase.
Unfortunately at intel Gen 6 and higher the precompiled version of the
fragment shaders is not used and every fragment shader is compiled twice.
These double fragment shaders also are added to the memory cache
and disk cache.
This is caused by setting wrong values to variables at the key during
precompiling at routine crocus_create_fs_state() at src/gallium/drivers/crocus/crocus_program.c,
which differ from values at crocus_populate_fs_key() at src/gallium/drivers/crocus/crocus_state.c.

This commit solves 3 problems:

it adjusts the predicted value 'input_slots_valid' at Gen 6
it adjusts the predicted value 'ignore_sample_mask_out' at Gen 6 and higher
it predicts the value 'multisample_fbo' , which helps if samplemask is used

Cc: mesa-stable
Signed-off-by: GKraats <vd.kraats@hccnet.nl>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35605>
2026-04-22 20:50:29 +00:00
Valentine Burley
96d17d18be zink/ci: Move Turnip flakes to correct list
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These belong in the zink directory, not freedreno. Also add 2-sample
variants and document the origin.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41111>
2026-04-22 19:56:11 +00:00
Silvio Vilerino
f07be3b416 d3d12: Create PIPE_BIND_SHARED resources with D3D12_RESOURCE_FLAG_ALLOW_SIMULTANEOUS_ACCESS
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41110>
2026-04-22 18:08:30 +00:00
Emma Anholt
3a8ff22336 ci: Delete references to various broken traces.
These are all being removed from the repos, so no need to leave the old
notes around.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40959>
2026-04-22 17:39:31 +00:00
Emma Anholt
2ee4da8677 ci/llvmpipe: Use anholt's new GPU trace snapshot comparison tool.
The new tool has much better image diffing presentation (thanks to
Danilo's work on turnip's private trace CI), better performance, flake
checking within a single run, parallelized downloads along with replays,
and ability to cache downloaded files to improve runtime, and system
monitoring (for debugging OOM-related slowdowns).

./bin/update_traces_checksum.sh still updates based on the output of a CI
run, but you can also apply a patch file that the tool generates, if you
do offline runs using your traces.toml.

New traces being replayed, in less overall runtime (2 minutes instead of 3):

- minetest/minetest-high-v3.trace (new version, not the old flaky one)
- neverball/neverball-v2.trace
- ror/ror-default.trace
- supertuxkart/supertuxkart-mansion-egl-gles-v2.b.trace
- valve/counterstrike-v2.trace
- valve/portal-2-v2.trace
- xonotic/xonotic-keybench-high-v2.trace

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40959>
2026-04-22 17:39:31 +00:00
Martin Roukala (né Peres)
931d7d1fad zink/ci: mark blender-demo-cube_diorama as flaky on gfx1201
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41100>
2026-04-22 17:19:22 +00:00
Daniel Schürmann
1f9a0490c6 nir/opt_loop: Don't peel initial break from do-while loops
As the main purpose of this optimization is to transform
while- into do-while loops, don't apply on loops which are
already in do-while form. Also set nir_loop::do_while after
this transformation, so that it is only applied once.

Totals from 576 (0.28% of 202440) affected shaders: (Navi48)
Instrs: 1337529 -> 1253438 (-6.29%); split: -6.36%, +0.07%
CodeSize: 8390852 -> 7837328 (-6.60%); split: -6.61%, +0.01%
VGPRs: 50856 -> 50844 (-0.02%)
SpillSGPRs: 42198 -> 35395 (-16.12%); split: -16.13%, +0.01%
SpillVGPRs: 47608 -> 44620 (-6.28%)
Latency: 31043828 -> 44143753 (+42.20%); split: -0.06%, +42.26%
InvThroughput: 6973433 -> 10079000 (+44.53%); split: -0.08%, +44.61%
VClause: 26839 -> 24718 (-7.90%); split: -7.91%, +0.00%
SClause: 21831 -> 21583 (-1.14%); split: -1.52%, +0.38%
Copies: 183503 -> 150040 (-18.24%); split: -18.84%, +0.61%
Branches: 27738 -> 26848 (-3.21%); split: -5.12%, +1.91%
PreSGPRs: 40233 -> 39083 (-2.86%); split: -2.88%, +0.02%
PreVGPRs: 38745 -> 38903 (+0.41%); split: -0.02%, +0.43%
VALU: 688396 -> 645948 (-6.17%); split: -6.17%, +0.01%
SALU: 189792 -> 177642 (-6.40%); split: -6.97%, +0.57%
VMEM: 121500 -> 112748 (-7.20%)
SMEM: 38765 -> 37767 (-2.57%); split: -2.58%, +0.00%
VOPD: 102488 -> 89071 (-13.09%); split: +0.24%, -13.33%

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40349>
2026-04-22 10:34:58 +00:00
Pavel Ondračka
485586b184 r300,i915/ci: update expectations
More accurate asin and atan push few tests over the instruction limit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41094>
2026-04-22 10:16:43 +00:00
Valentine Burley
220d01fd2a zink/ci: Document recent flakes
These flakes have caused job failures in the last two weeks.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41095>
2026-04-22 09:46:30 +00:00
Lionel Landwerlin
6031d52393 anv: implement VK_EXT_primitive_restart_index
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40776>
2026-04-22 08:52:57 +00:00
Samuel Pitoiset
9d17a7bdb4 spirv,treewide: rework specialization constant
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With SPV_KHR_constant_data, it's allowed to specialize array of
constants.

RustiCL changes are from Karol Herbst <kherbst@redhat.com>.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41046>
2026-04-22 06:57:55 +00:00
Eric R. Smith
4ae192a3d9 glsl, spirv: Improve accuracy of asin() and acos()
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The polynomial used for asin_expr() was suboptimal (and its source was
not documented).

A better approximation is found in the _Handbook_of_Mathematical_Functions_
by Abramowitz and Stegun, which is used in Nvidia's Cg toolkit. However,
while this approximation gives a good absolute error bound, its relative
error exceeds the 4096 ulp allowed by the Vulkan spec. Taking a page
from the spirv implementation of asin(), we implement a piecewise
approximation where a Taylor series is used for small values of |x|.
This patch also harmonizes the GLSL and Vulkan implementations by moving
the implementation to common code (nir_builder).

Running tests on asin() with a grid of 64000 samples between 0.0 and +1.0,
the original asin() at 32 bits has:
```
                       glsl                       spirv
  RMSE:            1.756451e-04                 1.609091e-04
  worst abs error: 3.904104e-04 at 0.937001     3.904104e-04 at 0.937001
  worst ulp error: 11800 at 6.2499e-05          3826 at 0.841331
```
whereas the new implementation has for both:
```
  RMSE:            2.528056e-05
  worst abs error: 4.962087e-05 at 0.451149
  worst ulp error: 2379 at 0.215106
```

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40862>
2026-04-21 21:10:22 +00:00
Jesse Natalie
6f8656ec64 microsoft/compiler: Back-propagate interpolator modes from FS
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41067>
2026-04-21 18:31:31 +00:00
Valentine Burley
17d03d98c7 ci/zink/intel: Disable flaky TGL canvas_moire-v2 trace
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Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41083>
2026-04-21 15:37:19 +02:00
Lionel Landwerlin
b10be13434 ci/zink/intel: disable TGL demo-v2 trace
Flaky trace, renders at the wrong resolution (32x32).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41083>
2026-04-21 15:41:28 +03:00
Samuel Pitoiset
87e95c5e50 radv: advertise VK_EXT_host_image_copy by default on GFX10.3+
Latest addrlib supports SIMD (AVX2) and it's definitely fast enough to
be used in production now.

GFX10 is still not enabled by default due to some regressions from the
addrlib bump, also still missing AVX for some formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40996>
2026-04-21 10:14:43 +00:00
Jesse Natalie
7adfea17e3 d3d12: Handle THREAD_SAFE maps and use them for async query results
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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41061>
2026-04-20 18:09:30 +00:00
Erik Faye-Lund
ffe77d756f gallium: remove defunct pipe-cap
This is no longer in use, let's just drop the cap here.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:21 +00:00
Erik Faye-Lund
0a8072f66e llvmpipe: drop support for tgsi_tex_txf_lz cap
LLVMpipe is the only driver that actually has supported the instructions
that this cap reports about. But TGSI is a dying IR, and this helps very
little; the compiler back-end will optimize this away anways.

So let's drop it to reduce complexity.

Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:20 +00:00
Erik Faye-Lund
4c7b212165 iris,crocus: remove benign but unsupported cap
These instructions were never supported on Iris, as it never supported
TGSI. This didn't lead to any issues because tgsi_to_nir normalized the
result. This mistake got carried forward when creating crocus as well.

Let's just stop reporting it; it doesn't do anything useful.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:20 +00:00
Erik Faye-Lund
a4bec6a001 d3d12: remove benign but unsupported cap
This was never supported in the D3D12 driver, but it never caused any
harm, because the conversion to NIR normalized things for us.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:20 +00:00
Erik Faye-Lund
261cb0e9bf radeonsi: remove old, unsupported cap
This hasn't been supported for a long time.

Fixes: 420fe1e7f9 ("radeonsi: remove TGSI")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:20 +00:00
Erik Faye-Lund
b062062430 nouveau: do not report unsupported feature
This hasn't been supported since the TGSI envvar was ripped out. When
converted to NIR, we don't see these instructions at all.

Fixes: c3cbe610df ("nouveau: Delete the NV50_PROG_USE_TGSI env var.")
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40993>
2026-04-20 17:09:20 +00:00
Erik Faye-Lund
d76e4f6054 pan/lib: validate data_size_B in drivers
In order to be able to properly check for maxResourceSize on Vulkan, we
need to be able to report the size even for resources that overflow that
limit. Otherwise we end up failing to find a usable modifier rather than
properly report the problem to the application. This means we need to move
the check out of the mod-handler.

There's no need to validate the slice-stride. The reason is a little bit
complicated, but we have two possible cases:

1. V10 and before: the image-size and the slice-stride are both limited
   to UINT32_MAX. Since the image-size is always at least as large as the
   slice-stride, it's enough to check the image-stride.
2. V11 and later: 37 bits is large enough to store any valid
   slice-stride. The only way we could blow this one up, would be to
   pass out-of-range width or height, which is already either validated
   by higher-level logic (gallium) or UB (vulkan). This is important,
   because we don't have another mandate to reject large resources on
   Vulkan; we can only reject due to maxResourceSize, not an individual
   plane.

So let's move this out to the call-site. We don't need to do anything
for PanVK, becuase it already checks for maxResourceSize.

To keep the Gallium and Vulkan driver as similar as reasonably possible,
check against the whole resource even in Gallium, where we could have
gotten away with checking a plane at the time instead.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40999>
2026-04-20 16:00:56 +00:00
Patrick Lerda
0deac18581 r600: fix atomic_counter_post_dec
This change was tested on plam and cayman. Here are the tests fixed:
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-aoa-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-array-fs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-cs: fail pass
spec/arb_gl_spirv/execution/uniform/atomic-uint-fs: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40822>
2026-04-20 15:04:42 +00:00
Patrick Lerda
032a2bdc1e r600: update vertex emit_varying_pos
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This change adds a minimal support for gl_PointSize to
be used alongside gl_ClipDistance/gl_CullDistance.

This change was tested on palm and cayman. Here is the test fixed:
khr-gl4[5-6]/gl_spirv/spirv_validation_builtin_variable_decorations_test: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40701>
2026-04-20 14:08:41 +00:00
Patrick Lerda
84c3489e38 r600: implement msaa 2d view from array
This functionality was not working.

To fix this issue, the texture mode needs to be set to
V_030000_SQ_TEX_DIM_2D_MSAA. When this mode is processed
the gpu only takes the layer 0. This change implements
this functionality by copying the layer to a new resource.

This change was tested on palm, barts and cayman. Here is the
test fixed:
khr-gl4[2-6]/texture_view/view_sampling: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40567>
2026-04-20 13:53:37 +00:00
Patrick Lerda
7bbb251936 r600: make r600_copy_region_with_blit global
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40567>
2026-04-20 13:53:36 +00:00
Patrick Lerda
9815901f86 r600: implement tes and tcs instanced gl_PrimitiveID support
This change extends r600_lds_constant_buffer to
implement a fully conformant gl_PrimitiveID at
the tes and tcs stages.

This change was tested on cayman and barts. Here are the tests fixed:
spec/arb_tessellation_shader/execution/tcs-primitiveid-instanced: fail pass
spec/arb_tessellation_shader/execution/tes-no-tcs-primitiveid-instanced: fail pass
spec/arb_tessellation_shader/execution/tes-primitiveid-instanced: fail pass
khr-gl4[4-6]/tessellation_shader/tessellation_shader_tessellation/gl_invocationid_patchverticesin_primitiveid: fail pass
khr-gles31/core/tessellation_shader/tessellation_shader_tessellation/gl_invocationid_patchverticesin_primitiveid: fail pass
khr-glesext/tessellation_shader/tessellation_shader_tessellation/gl_invocationid_patchverticesin_primitiveid: fail pass

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40297>
2026-04-20 13:21:55 +00:00
Patrick Lerda
48902771ad r600: fix atomic buffer offset
The atomic offset implementation was incomplete.

This change was tested on cayman, it fixes all the
variants of this test:
khr-gl4[2-6]/shader_atomic_counters/advanced-usage-multi-stage: fail pass
khr-gles31/core/shader_atomic_counters/advanced-usage-multi-stage: fail pass

Fixes: 06993e4ee3 ("r600: add support for hw atomic counters. (v3)")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40170>
2026-04-20 13:05:55 +00:00
Patrick Lerda
675056ab95 r600: remove r600_get_hw_atomic_count
This is not used anymore and the atomic_base
could interfere with some operations.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40170>
2026-04-20 13:05:54 +00:00
Patrick Lerda
72dcc82618 r600: enable EXT_texture_shadow_lod
The support needed only a minor adjustment.

Note: As far as rv770 is concerned: khr-gl33 (4/12),
the support needs some work and is disabled.

This change was tested on palm, barts and cayman: piglit (3/3)
khr-gl46 (15/16). The failing test: sampler2darrayshadow_vertex
is referenced as "Bug 21620051" (VK-GL-CTS) and seems to have
a problem.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39915>
2026-04-20 12:49:53 +00:00
Patrick Lerda
1c00172eec r600: update r600 nir for sample_lz and sample_c_lz
This change enables the generation of the opcodes.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39915>
2026-04-20 12:49:53 +00:00
Patrick Lerda
19a22b9382 r600: add sample_lz and sample_c_lz opcodes compatibility
This change generates a better code and maintains the
compatibility with the array sampler types.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39915>
2026-04-20 12:49:52 +00:00
Patrick Lerda
7513f48edf r600: fix alpha-to-coverage and alpha-to-one used together
This change is inspired by b56f47611a ("radeonsi: fix
alpha-to-coverage + alpha-to-one used together for
gfx6-10.3") and implements the same algorithm.

This change was tested on rv770, palm and cayman. Here are the tests fixed:
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one: fail pass
spec/arb_framebuffer_object/execution/msaa-alpha-to-coverage_alpha-to-one_write-z: fail pass

Cc: mesa-stable
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39779>
2026-04-20 12:35:03 +00:00
Patrick Lerda
c54f134f60 r600: cypress resinfo buffer size workaround
Reading the buffer size (GET_BUFFER_RESINFO) does not work
on cypress. This issue is the main difference on a test
basis between cypress and other gpus like palm and cayman.
This change adds a dedicated function which extends the
previous workaround algorithm for cubearray to this end.

This change assumes that all the gpus between cedar and
hemlock have the same issue.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39650>
2026-04-20 12:12:25 +00:00
Patrick Lerda
34336c7f16 r600: rename sh_txs_cube_array_comp to sh_resinfo_via_uniform
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39650>
2026-04-20 12:12:25 +00:00
Patrick Lerda
89dd088871 r600: refactor eg_setup_buffer_constants
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39650>
2026-04-20 12:12:24 +00:00
Patrick Lerda
d17654c1b5 r600: refactor r600_shader_buffer_info_sel
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39650>
2026-04-20 12:12:23 +00:00
David Rosca
7a8721e95c d3d12: Use HEVC RefPicSet order from frontend
It is correctly sorted in frontend since 779edc0759 ("frontends/va: Correctly derive HEVC StCurrBefore, StCurrAfter and LtCurr")

This fixes RefPicSetLtCurr order which was incorrectly sorted here.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41021>
2026-04-20 08:24:22 +00:00