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5978 commits

Author SHA1 Message Date
Rhys Perry
0a04200ba7 nir/linking_helpers: invalidate metadata in nir_link_opt_varyings 
nir_instr_insert and nir_def_init invalidate nir_metadata_instr_index and
nir_metadata_live_defs, but not nir_metadata_loop_analysis

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33354>
 2025-02-10 15:01:37 +00:00
Rhys Perry
ebf8e072b4 nir/find_array_copies: invalidate nir_metadata_instr_index 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33354>
 2025-02-10 15:01:37 +00:00
Rhys Perry
422e3e1249 nir/lower_io_arrays_to_elements: invalidate metadata 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33354>
 2025-02-10 15:01:37 +00:00
Rhys Perry
b5a9ab90d2 nir/opt_move: invalidate nir_metadata_instr_index 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33354>
 2025-02-10 15:01:37 +00:00
Rhys Perry
f42b72a08f nir/use_dominance: invalidate nir_metadata_instr_index 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33354>
 2025-02-10 15:01:37 +00:00
Georg Lehmann
0bc1bffe9a nir/opt_move: don't move into critical sections 
Foz-DB Navi31:
Totals from 6694 (8.43% of 79377) affected shaders:
Instrs: 4125152 -> 4119037 (-0.15%); split: -0.16%, +0.01%
CodeSize: 22786832 -> 22761612 (-0.11%); split: -0.12%, +0.01%
Latency: 23343080 -> 23270421 (-0.31%); split: -0.32%, +0.01%
InvThroughput: 3449821 -> 3449859 (+0.00%); split: -0.00%, +0.00%
SClause: 176624 -> 176219 (-0.23%); split: -0.23%, +0.00%
Copies: 256709 -> 255739 (-0.38%)
PreVGPRs: 240038 -> 240251 (+0.09%)
SALU: 336732 -> 334794 (-0.58%)

Foz-DB Navi21:
Totals from 11227 (14.14% of 79377) affected shaders:
MaxWaves: 279804 -> 279796 (-0.00%)
Instrs: 6652332 -> 6650912 (-0.02%); split: -0.02%, +0.00%
CodeSize: 35974500 -> 35968152 (-0.02%); split: -0.02%, +0.00%
VGPRs: 491440 -> 491512 (+0.01%); split: -0.00%, +0.02%
Latency: 34291475 -> 34247972 (-0.13%); split: -0.15%, +0.02%
InvThroughput: 7603701 -> 7603724 (+0.00%); split: -0.00%, +0.00%
VClause: 132041 -> 132068 (+0.02%); split: -0.00%, +0.02%
SClause: 239880 -> 239438 (-0.18%); split: -0.20%, +0.01%
Copies: 530000 -> 529986 (-0.00%); split: -0.00%, +0.00%
PreVGPRs: 393471 -> 394170 (+0.18%); split: -0.00%, +0.18%
VALU: 4274980 -> 4274966 (-0.00%); split: -0.00%, +0.00%

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33417>
 2025-02-08 17:31:18 +00:00
Rhys Perry
3c5bcc5f7f nir/algebraic: optimize ishl(iadd(iadd(a, #b), c), #d) 
fossil-db (navi31):
Totals from 671 (0.85% of 79377) affected shaders:
MaxWaves: 17048 -> 17052 (+0.02%); split: +0.04%, -0.01%
Instrs: 786643 -> 785459 (-0.15%); split: -0.20%, +0.05%
CodeSize: 4074988 -> 4069304 (-0.14%); split: -0.18%, +0.04%
VGPRs: 43896 -> 43860 (-0.08%); split: -0.11%, +0.03%
SpillSGPRs: 753 -> 748 (-0.66%)
Latency: 8187731 -> 8186707 (-0.01%); split: -0.11%, +0.10%
InvThroughput: 1274564 -> 1274582 (+0.00%); split: -0.11%, +0.11%
VClause: 14292 -> 14183 (-0.76%); split: -0.98%, +0.22%
SClause: 21527 -> 21426 (-0.47%); split: -0.53%, +0.06%
Copies: 59381 -> 59299 (-0.14%); split: -0.67%, +0.53%
PreSGPRs: 29358 -> 29349 (-0.03%)
PreVGPRs: 36595 -> 36368 (-0.62%); split: -0.70%, +0.08%
VALU: 482669 -> 481927 (-0.15%); split: -0.21%, +0.06%
SALU: 70019 -> 70009 (-0.01%); split: -0.06%, +0.05%
VOPD: 142 -> 139 (-2.11%)

fossil-db (navi21):
Totals from 671 (0.85% of 79377) affected shaders:
MaxWaves: 11536 -> 11516 (-0.17%); split: +0.03%, -0.21%
Instrs: 773615 -> 772476 (-0.15%); split: -0.18%, +0.03%
CodeSize: 4092564 -> 4086688 (-0.14%); split: -0.17%, +0.03%
VGPRs: 43424 -> 43448 (+0.06%); split: -0.04%, +0.09%
SpillSGPRs: 565 -> 560 (-0.88%)
Latency: 8650893 -> 8633993 (-0.20%); split: -0.31%, +0.11%
InvThroughput: 1920741 -> 1920368 (-0.02%); split: -0.10%, +0.08%
VClause: 15830 -> 15774 (-0.35%); split: -0.76%, +0.40%
SClause: 21025 -> 21009 (-0.08%); split: -0.11%, +0.03%
Copies: 65425 -> 65460 (+0.05%); split: -0.37%, +0.43%
Branches: 21845 -> 21848 (+0.01%)
PreSGPRs: 29457 -> 29448 (-0.03%)
PreVGPRs: 37296 -> 37066 (-0.62%); split: -0.69%, +0.08%
VALU: 516908 -> 516056 (-0.16%); split: -0.20%, +0.04%
SALU: 91545 -> 91531 (-0.02%); split: -0.05%, +0.03%

fossil-db (vega10):
Totals from 497 (0.79% of 62962) affected shaders:
MaxWaves: 2325 -> 2328 (+0.13%); split: +0.17%, -0.04%
Instrs: 298230 -> 297284 (-0.32%); split: -0.35%, +0.03%
CodeSize: 1535212 -> 1530636 (-0.30%); split: -0.34%, +0.04%
SGPRs: 36464 -> 36480 (+0.04%)
VGPRs: 29412 -> 29396 (-0.05%); split: -0.07%, +0.01%
SpillSGPRs: 164 -> 159 (-3.05%)
Latency: 3957230 -> 3948919 (-0.21%); split: -0.51%, +0.30%
InvThroughput: 1680680 -> 1679105 (-0.09%); split: -0.17%, +0.08%
VClause: 6175 -> 6102 (-1.18%); split: -1.55%, +0.37%
SClause: 9503 -> 9510 (+0.07%); split: -0.15%, +0.22%
Copies: 20992 -> 20892 (-0.48%); split: -0.97%, +0.50%
PreSGPRs: 17803 -> 17795 (-0.04%)
PreVGPRs: 23072 -> 22823 (-1.08%); split: -1.11%, +0.03%
VALU: 225322 -> 224587 (-0.33%); split: -0.36%, +0.04%
SALU: 21029 -> 21011 (-0.09%); split: -0.22%, +0.13%

fossil-db (polaris10):
Totals from 489 (0.79% of 61794) affected shaders:
Instrs: 299330 -> 298308 (-0.34%); split: -0.40%, +0.06%
CodeSize: 1529316 -> 1525440 (-0.25%); split: -0.32%, +0.07%
SpillSGPRs: 159 -> 149 (-6.29%)
Latency: 3924819 -> 3898471 (-0.67%); split: -0.93%, +0.25%
InvThroughput: 1687167 -> 1684956 (-0.13%); split: -0.22%, +0.09%
VClause: 6248 -> 6067 (-2.90%); split: -3.28%, +0.38%
SClause: 9519 -> 9492 (-0.28%); split: -0.72%, +0.44%
Copies: 21673 -> 21637 (-0.17%); split: -0.90%, +0.73%
PreSGPRs: 17611 -> 17603 (-0.05%)
PreVGPRs: 22873 -> 22625 (-1.08%)
VALU: 226805 -> 225928 (-0.39%); split: -0.45%, +0.06%
SALU: 21419 -> 21413 (-0.03%); split: -0.28%, +0.25%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
150305bbb8 nir/load_store_vectorize: fix sorting of vectors in add_to_entry_key 
fossil-db (navi31):
Totals from 13 (0.02% of 79377) affected shaders:
Instrs: 2997 -> 2990 (-0.23%); split: -0.77%, +0.53%
CodeSize: 16552 -> 16504 (-0.29%); split: -0.85%, +0.56%
Latency: 75923 -> 75744 (-0.24%); split: -0.30%, +0.06%
InvThroughput: 12741 -> 12754 (+0.10%); split: -0.14%, +0.24%
PreVGPRs: 225 -> 230 (+2.22%)
VALU: 1565 -> 1569 (+0.26%); split: -0.77%, +1.02%

fossil-db (navi21):
Totals from 13 (0.02% of 79377) affected shaders:
Instrs: 2522 -> 2518 (-0.16%); split: -0.75%, +0.59%
CodeSize: 14660 -> 14620 (-0.27%); split: -0.85%, +0.57%
Latency: 77878 -> 77634 (-0.31%); split: -0.36%, +0.05%
InvThroughput: 15512 -> 15518 (+0.04%); split: -0.15%, +0.19%
Copies: 230 -> 231 (+0.43%); split: -0.87%, +1.30%
PreVGPRs: 225 -> 230 (+2.22%)
VALU: 1536 -> 1541 (+0.33%); split: -0.91%, +1.24%

fossil-db (vega10):
Totals from 13 (0.02% of 62962) affected shaders:
Instrs: 2684 -> 2674 (-0.37%); split: -0.75%, +0.37%
CodeSize: 14784 -> 14752 (-0.22%); split: -0.65%, +0.43%
Latency: 118228 -> 118215 (-0.01%); split: -0.06%, +0.05%
InvThroughput: 42893 -> 42892 (-0.00%); split: -0.11%, +0.11%
SClause: 63 -> 62 (-1.59%)
PreVGPRs: 236 -> 241 (+2.12%)
VALU: 1665 -> 1666 (+0.06%); split: -0.72%, +0.78%

fossil-db (polaris10):
Totals from 9 (0.01% of 61794) affected shaders:
Instrs: 1872 -> 1885 (+0.69%); split: -0.16%, +0.85%
CodeSize: 9980 -> 10012 (+0.32%); split: -0.20%, +0.52%
Latency: 82331 -> 82382 (+0.06%); split: -0.01%, +0.07%
InvThroughput: 30603 -> 30686 (+0.27%)
SClause: 44 -> 45 (+2.27%)
Copies: 252 -> 256 (+1.59%)
PreVGPRs: 169 -> 173 (+2.37%)
VALU: 1100 -> 1117 (+1.55%); split: -0.27%, +1.82%
SALU: 430 -> 434 (+0.93%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
0a699e16f9 nir/load_store_vectorize: handle load_buffer_amd/store_buffer_amd 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
cfa217ee04 nir/opt_offsets: don't check NUW for unswizzled buffer_amd 
This isn't necessary.

fossil-db (navi21):
Totals from 13 (0.02% of 79377) affected shaders:
Instrs: 18070 -> 18042 (-0.15%); split: -0.17%, +0.01%
CodeSize: 98336 -> 98012 (-0.33%)
Latency: 72735 -> 72992 (+0.35%); split: -0.02%, +0.38%
InvThroughput: 13157 -> 13105 (-0.40%)
VClause: 334 -> 324 (-2.99%)
SClause: 563 -> 564 (+0.18%)
Copies: 1194 -> 1197 (+0.25%)
VALU: 12330 -> 12297 (-0.27%)

fossil-db (polaris10):
Totals from 10 (0.02% of 61794) affected shaders:
Instrs: 4543 -> 4441 (-2.25%)
CodeSize: 30196 -> 29388 (-2.68%)
Latency: 64290 -> 64272 (-0.03%); split: -0.05%, +0.02%
InvThroughput: 20371 -> 20362 (-0.04%); split: -0.08%, +0.04%
VClause: 195 -> 135 (-30.77%)
Copies: 97 -> 100 (+3.09%)
PreSGPRs: 178 -> 177 (-0.56%)
VALU: 1765 -> 1666 (-5.61%)
VMEM: 2448 -> 2445 (-0.12%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Rhys Perry
539f9b4ba6 nir,aco,radv: add align_mul/offset to buffer_amd intrinsics 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29242>
 2025-02-07 13:52:57 +00:00
Samuel Pitoiset
baa09cb94a nir: adjust number of components for cmat_muladd_amd 
On GFX12, A&B matrices can be vectors of 4 or 8 elements.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33378>
 2025-02-07 12:06:10 +00:00
Lionel Landwerlin
fdaf7c7b96 nir: add a high precision conversion unorm->float 
We'll use this for D32->D24X8 conversion on Intel on Gfx11/Gfx12.0/DG2
(where HW doesn't have fp64 support).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33422>
 2025-02-06 08:20:21 +00:00
Alyssa Rosenzweig
bf48eae1f9 nir: drop printf_base_identifier 
superseded.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380>
 2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
e3bc6eafc8 nir/lower_printf: hash format strings in nir_printf_fmt 
Lionel added a neat debugging tool. Let's make it work with the new-style
hashing approach too, since nir_printf_fmt is a lot more convenient than needing
to define a dedicated CL function to access printf (although that works too).

We remove the old non-hashed path, because it has no more functional users --
hashing is a hard requirement with vtn_bindgen2, which Intel has now switched
to.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33380>
 2025-02-05 20:33:15 +00:00
Alyssa Rosenzweig
780b814354 nir: add lod_bias_min_agx tex src 
this lets nir_opt_preamble Just Do The Right thing, so model in NIR

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33386>
 2025-02-05 17:27:18 +00:00
Alyssa Rosenzweig
c5de33e48e nir: add image_min_lod_agx 
for EXT_image_view_min_lod emulation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33386>
 2025-02-05 17:27:18 +00:00
Georg Lehmann
ed675272f4 nir/lower_poly_line_smooth: use intrinsics_pass 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33340>
 2025-02-05 11:23:35 +00:00
Georg Lehmann
998e2299f7 nir/lower_poly_line_smooth: don't reject fp16 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33340>
 2025-02-05 11:23:35 +00:00
Georg Lehmann
359ba65903 nir/lower_poly_line_smooth: support partial store_output 
RADV needs this to skip if there is no alpha component

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33340>
 2025-02-05 11:23:35 +00:00
Georg Lehmann
6c410456d9 nir/lower_poly_line_smooth: only smooth first color target 
The VK spec says:
coverage value is multiplied into the color location 0’s
alpha value after fragment shading

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33340>
 2025-02-05 11:23:34 +00:00
Georg Lehmann
534c2ceac8 nir/lower_poly_line_smooth: don't emit control flow 
The if is really short so it should really use a conditional select,
but this pass is called too late go through all the usual lowerings
and opts.

Foz-DB Navi21:
Totals from 1128 (1.42% of 79377) affected shaders:
MaxWaves: 29358 -> 29342 (-0.05%)
Instrs: 552306 -> 549668 (-0.48%); split: -0.58%, +0.10%
CodeSize: 2796392 -> 2782360 (-0.50%); split: -0.59%, +0.08%
Latency: 2574361 -> 2566482 (-0.31%); split: -0.47%, +0.16%
InvThroughput: 644047 -> 647500 (+0.54%); split: -0.18%, +0.72%
Copies: 37521 -> 36460 (-2.83%); split: -2.92%, +0.09%
Branches: 12009 -> 10157 (-15.42%)
VALU: 350886 -> 349199 (-0.48%); split: -0.64%, +0.16%
SALU: 104459 -> 105415 (+0.92%); split: -0.00%, +0.92%

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33340>
 2025-02-05 11:23:34 +00:00
Sil Vilerino
1e869b3750 nir.h: Fix warning C4800 forcing value to bool 'true' or 'false' 
Reviewed-By: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jesse Natalie <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33332>
 2025-02-03 11:06:59 +00:00
Alyssa Rosenzweig
72bd3a6004 nir: include __LINE__ in NIR_PASS validation results 
useful when validation blows up in a file containing many intrinsic
passes, to figure out which one is borked.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
e6b22e2309 nir: add nir_call_serialized helper 
this will be used internally in vtn_bindgen2.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
0727b7a079 nir: introduce bindgen_return 
with vtn_bindgen2, we'll want return values without derefs. this needs some
special handholding.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
d4ec0fc381 nir/serialize: add specialized function serialization 
with vtn_bindgen2 we only care about a single function at a time, not a whole
nir_shader, and it would be quite wasteful to serialize all the shader info
every time. add a specialized serialize just for 1 function.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
646903ed7a nir/print: extract nir_print_function_body 
this will be used for more concise prints in vtn_bindgen2.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
7e467daac4 nir/lower_scratch_to_var: handle multi-function shaders 
It's not at all clear how this pass should work with real function calls (if at
all), but at least this is enough to handle collections of self-contained
functions which vtn_bindgen2 wants.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
50428f3c8a nir/lower_scratch_to_var: handle KERNELs 
need 64-bit indices or else we blow up.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Alyssa Rosenzweig
63c94cf755 nir: add nir_function_intrinsics_pass 
we already have

* nir_shader_instructions_pass
* nir_shader_intrinsics_pass
* nir_function_instructions_pass

add the missing fourth, it's useful too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33099>
 2025-01-31 16:17:59 +00:00
Konstantin Seurer
00d17f3dbe nir/lower_vars_to_ssa: Annotate defs with variable names 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
 2025-01-30 20:14:01 +00:00
Konstantin Seurer
ce0f30b230 nir: Add variable debug info to instructions 
Allows for annotating defs with variable names.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
 2025-01-30 20:14:01 +00:00
Konstantin Seurer
60a20bcf3d nir: Stop using instructions for debug info 
Annotating ssa defs without affecting compilation is impossible with
debug info instructions since referencing a nir_def from the debug info
instr will add uses.

The old approach also stops worrking if passes reorder instructions.

This patch proposes a solution which should not regress performance just
like the old approach. The difference is that this one allocates a bit
more space for debug info instead of adding a new instruction for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33141>
 2025-01-30 20:14:01 +00:00
Daniel Schürmann
3868102a04 nir/loop_analyze: stack-allocate loop_info_state 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
fbaabcfb0a nir/loop_analyze: store nir_loop_induction_variable hash table in loop_info 
No need to create a separate array.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
f327ece9bf nir/loop_analyze: re-use the same nir_loop_variable struct before and after the increment 
The information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
de30bfd5b8 nir/loop_analyze: ignore terminating induction variable in guess_loop_limit() 
The array access might be using a different induction variable.

Totals from 23 (0.03% of 79395) affected shaders: (Navi31)
Instrs: 113742 -> 121017 (+6.40%)
CodeSize: 592152 -> 636228 (+7.44%)
Latency: 439244 -> 426784 (-2.84%)
InvThroughput: 36264 -> 35199 (-2.94%)
SClause: 3048 -> 3426 (+12.40%)
Copies: 10630 -> 10733 (+0.97%)
Branches: 3774 -> 4310 (+14.20%)
PreSGPRs: 1683 -> 1696 (+0.77%)
PreVGPRs: 1230 -> 1232 (+0.16%)
VALU: 51026 -> 55912 (+9.58%)
SALU: 15270 -> 15638 (+2.41%)
SMEM: 4456 -> 5149 (+15.55%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:36 +00:00
Daniel Schürmann
7eb2e96d16 nir/loop_analyze: insert only induction vars into hash map 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
f0fd04327f nir/loop_analyze: replace nir_loop_variable array with hash table 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
642a980c9e nir/loop_analyze: don't initialize nir_loop_variable separately 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
f11edceae3 nir/loop_analyze: directly record induction variables into nir_loop_info 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
e639c4d74f nir/loop_analyze: remove nir_loop_variable::in_loop 
This information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
7f244ced10 nir/loop_analyze: remove nir_loop_variable::in_if_branch and nir_loop_variable::in_nested_loop 
This information is redundant.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Daniel Schürmann
83f395a7ce nir/loop_analyze: only iterate loop header phis in compute_induction_information() 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33131>
 2025-01-30 03:48:35 +00:00
Alyssa Rosenzweig
d58ece8d83 nir/serialize: strip function names names 
this makes stripped nir smaller.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33273>
 2025-01-29 14:37:41 +00:00
Marek Olšák
71e95b373b radeonsi: remove si_shader_info code that is no longer needed 
A lot of this info is now derived from shader variant NIR.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:56 +00:00
Marek Olšák
d580313929 radeonsi: add load_polygon_stipple_buffer_amd instead of using si_shader_args 
We will lower polygon stipple before we have si_shader_args, so we need
an intrinsic to get the buffer descriptor.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32910>
 2025-01-29 07:19:43 +00:00
Friedrich Vock
50e6e3e4ad nir: Add indirect call optimizations 
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29577>
 2025-01-29 04:38:51 +00:00
Friedrich Vock
ebbb18aeb6 nir: Free liveness info when invalidating metadata 
Liveness info can be huge, since with larger shaders it essentially
grows quadratically (linear increase in number of SSA defs *
linear increase in blocks).

Freeing liveness info early helps somewhat mitigate memory usage here.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29577>
 2025-01-29 04:38:51 +00:00