Brian Paul
e33ea11c14
mesa: remove: unused gl_vertex_program::TnlData field
2009-09-24 19:34:19 -06:00
Zack Rusin
228aa45fcb
st/xorg: start working on the Xv acceleration code
2009-09-24 19:20:41 -04:00
Zack Rusin
80965fca74
st/xorg: fills are supported plussome minor clenups
2009-09-24 19:20:41 -04:00
Zack Rusin
53d2fa46e7
st/xorg: add easier way of disabling/enabling acceleration
2009-09-24 19:20:41 -04:00
Brian Paul
01249c6d56
llvmpipe: add missing __FUNCTION__ parameter to debug_printf() calls
2009-09-24 16:08:47 -06:00
Brian Paul
a665a3416e
llvmpipe: increase max 3D texture size to 256
2009-09-24 16:07:45 -06:00
Brian Paul
29d27229a9
Merge branch 'mesa_7_6_branch'
...
Conflicts:
src/mesa/vbo/vbo_exec_array.c
2009-09-24 16:06:21 -06:00
Brian Paul
940ca2e837
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
2009-09-24 16:01:26 -06:00
Vinson Lee
1730b8db12
softpipe: Increase GL_MAX_3D_TEXTURE_SIZE to 256.
2009-09-24 15:59:57 -06:00
Eric Anholt
726a04a2cd
i965: Emit zero initialization for NV VP temporaries as required.
...
This is similar to what r300 does inside the driver, but I've added it as
a generic option since it seems most hardware will want it.
Fixes piglit nv-init-zero-reg.vpfp and nv-init-zero-addr.vpfp.
2009-09-24 13:34:06 -07:00
Eric Anholt
a9a47afe7e
i965: Remove assert about NV_vp now that it somewhat works.
2009-09-24 13:34:06 -07:00
Eric Anholt
9018a7dd17
i965: Load NV program matrices when required.
2009-09-24 13:34:06 -07:00
Eric Anholt
601769a2c0
mesa: Initialize NV_vertex_program fields for the parameter lists and such.
...
This helps let drivers treat NV_vp like ARB_vp.
2009-09-24 13:34:06 -07:00
Brian Paul
60b152a1b3
mesa: remove glEnable(GL_DEPTH_BOUNDS_TEST_EXT) check/warning
...
At the time of the enable there may not be a Z buffer, but one
may be attached to the FBO later.
2009-09-24 14:24:14 -06:00
Brian Paul
adfa778c8e
mesa: remove rgbMode check in enable_texture()
...
If the currently bound FBO isn't yet validated it's possible for
rgbMode to be zero so we'll lose the texture enable.
This could fix some FBO rendering glitches, but I don't know of
any specific instances.
2009-09-24 14:19:06 -06:00
Brian Paul
b849c6f1b3
intel: use default array/element buffers in intel_generate_mipmap()
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If there happened to be a bound VBO when intel_generate_mipmap() was
called we blew up because of a bad vertex array pointer.
Fixes regnumonline, bug 23859.
2009-09-24 12:41:14 -06:00
Brian Paul
f0339f502c
mesa: replace assertion with no-op function assignment
2009-09-24 12:37:34 -06:00
Brian Paul
964792b025
mesa: added comment
2009-09-24 12:37:06 -06:00
Brian Paul
1a81611725
vbo: limit number of warnings to 10
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Otherwise some apps will emit tons of warnings.
2009-09-24 12:36:05 -06:00
Pauli Nieminen
fd56bee6c4
Merge branch 'mesa_7_6_branch'
2009-09-24 20:39:16 +03:00
Pauli Nieminen
1d2dca194c
radeon: Fix scissors for r600 KMS.
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Radeon generic scissors code had problem that some of code was using exclusive
and some inclusive bottom right corner. Only r600 driver is using exclusive
coordinate so changed generic code to pass inclusive coordinate and r600 driver
changes BR coordinate to be exclusive.
2009-09-24 20:37:55 +03:00
Brian Paul
c9f7a23ef0
Merge branch 'mesa_7_6_branch'
...
Conflicts:
src/mesa/drivers/dri/r600/r700_assembler.c
src/mesa/drivers/dri/r600/r700_chip.c
src/mesa/drivers/dri/r600/r700_render.c
src/mesa/drivers/dri/r600/r700_vertprog.c
src/mesa/drivers/dri/r600/r700_vertprog.h
src/mesa/drivers/dri/radeon/radeon_span.c
2009-09-24 11:03:16 -06:00
Brian Paul
7549a8397b
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
2009-09-24 10:52:15 -06:00
Brian Paul
6be2bc56af
gallium/trace: casts to silence warnings
2009-09-24 10:47:42 -06:00
Brian Paul
f85816354c
tgsi/sse: remove old comments
2009-09-24 10:45:36 -06:00
Brian Paul
35cd0bbfb1
tgsi/sse: implement SEQ, SGT, SLE, SNE
2009-09-24 10:45:35 -06:00
Brian Paul
a64d4516a0
tgsi/sse: Pass the lodbias, not zero. More comments.
...
This fixes the glean/glsl1 "texture2D(), with bias" test when using SSE.
2009-09-24 10:28:09 -06:00
Brian Paul
a491e25b1f
mesa: added default case return to silence warning
2009-09-24 10:28:09 -06:00
Brian Paul
00ddd4f9e9
glsl: init var to silence warning
2009-09-24 10:28:09 -06:00
Brian Paul
e44c084be5
glsl: fix missing initializers warning
2009-09-24 10:28:09 -06:00
Keith Whitwell
09a23ac3c1
progs/perf: fix warnings in readpixels test
2009-09-24 16:52:14 +01:00
Keith Whitwell
d93f022936
progs/perf: fix typo in sconscript
2009-09-24 16:50:27 +01:00
Keith Whitwell
90dcfb3b47
trace: fix printf warnings
2009-09-24 16:49:40 +01:00
Keith Whitwell
d3beaf2f32
softpipe: fix compiler warnings
2009-09-24 16:49:27 +01:00
Keith Whitwell
fca7f38441
pipebuffer: fix printf warnings
2009-09-24 16:49:05 +01:00
Keith Whitwell
0c55dd8094
pipebuffer: fix warnings
2009-09-24 16:48:49 +01:00
Keith Whitwell
cd362334ad
draw: fix warning
2009-09-24 16:44:58 +01:00
Keith Whitwell
6e0b56edf8
progs/perf: accept GL3.x also
2009-09-24 16:43:15 +01:00
Richard Li
5f06064b61
r600 : fix draw_prim bug: vertex fetcher setting.
2009-09-24 11:29:44 -04:00
José Fonseca
9659aa6482
softpipe: Use portable INLINE macro.
2009-09-24 15:28:55 +01:00
José Fonseca
e8e6d8853d
softpipe: Update SConscript.
2009-09-24 15:28:54 +01:00
Richard Li
41c5f113b5
r600 : disable draw_prim for now.
2009-09-24 10:15:19 -04:00
Andre Maasikas
2058dfaa47
r600: add support for CUBE textures, also TXP
...
seems to work here ...
2009-09-24 10:03:37 -04:00
Alex Deucher
639fb1472d
r600: fix typo in the last commit
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128 gprs, 256 reg-based consts
2009-09-24 10:03:22 -04:00
Alex Deucher
28308c9260
r600: various cleanups
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- max texture size is 8k, but mesa doesn't support
that at the moment.
- attempt to set shader limits to what the hw actually
supports
- clean up some old r300 cruft
- no need to explicitly disable irqs. This is fixed
in the drm now.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2009-09-24 10:03:08 -04:00
Andre Maasikas
ed91d10347
r600: fix some issues with LIT instruction
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- MUL_LIT is ALU.Trans instruction
- some Trans instructions can take 3 arguments
- don't clobber dst.x, use dst.z as temp, it'll get written correct
value in last insn
- respect source swizzles
2009-09-24 10:02:37 -04:00
Alex Deucher
48559c7605
r600: fix point sizes
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registers takes radius
2009-09-24 10:02:22 -04:00
Alex Deucher
095db818c6
r600: fix polygon offset
2009-09-24 10:02:08 -04:00
Alex Deucher
ec14d59afa
radeon: don't build non-r600 span code on r600
2009-09-24 10:01:56 -04:00
Alex Deucher
dbec27be85
r600: minor span cleanups
2009-09-24 10:01:41 -04:00
