Commit graph

40781 commits

Author SHA1 Message Date
Tom Stellard
e2301b45c2 r300/compiler: Fix register allocator's handling of loops
NOTE: This is a candidate for the 7.9 branch.
2010-11-21 18:48:31 -08:00
Tom Stellard
412803b5cd r300/compiler: Make sure presubtract sources use supported swizzles
NOTE: This is a candidate for the 7.9 branch.
2010-11-21 18:48:31 -08:00
Vinson Lee
9d08902457 r600: Remove unnecessary header. 2010-11-21 15:03:27 -08:00
Marek Olšák
2892c8bdbc docs: add GL 4.1 status 2010-11-21 23:03:58 +01:00
Marek Olšák
e40a58b7f8 st/mesa: enable ARB_explicit_attrib_location and EXT_separate_shader_objects
Gallium drivers pass all piglit tests for the two (there are 12 tests
for separate_shader_objects and 5 tests for explicit_attrib_location),
and I was told the extensions don't need any driver-specific code.

I made them dependent on PIPE_CAP_GLSL.

Signed-off-by: Brian Paul <brianp@vmware.com>
2010-11-21 19:33:45 +01:00
Brian Paul
5e3733fadf mesa: fix get_texture_dimensions() for texture array targets
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31779
2010-11-21 10:05:51 -07:00
Brian Paul
0ec0f1025d docs: update some GL 3.0 status 2010-11-21 09:40:28 -07:00
Brian Paul
5ed51e950f mesa: hook up GL 3.x entrypoints
Fix up some details in the xml files and regenerate dispatch files.
2010-11-21 09:20:44 -07:00
Brian Paul
81c347ef79 glapi: rename GL3.xml to GL3x.xml as it covers all GL 3.x versions 2010-11-21 09:20:43 -07:00
Brian Paul
197b1d7898 mesa: fix error msg typo 2010-11-21 09:20:43 -07:00
Daniel Vetter
c8fca58d9d i915g: kill idws->pool
The drm winsys only ever handles one gem memory manager. Rip out
the unnecessary complication.

Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:19 +01:00
Daniel Vetter
e182618853 i915g: kill buf->map_gtt
Not using the gtt is considered harmful for performance. And for
partial uploads there's always drm_intel_bo_subdata.

Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:19 +01:00
Daniel Vetter
d54d67499c i915g: kill RGBA/X formats
It's intel, so always little endian!

Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:19 +01:00
Daniel Vetter
8624fe7a49 i915g: add pineview pci ids
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:19 +01:00
Daniel Vetter
aba728eb25 i915g: s/hw_tiled/tiling
More in line with other intel drivers.

Change to use enum by Jakob Bornecrantz.

Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:18 +01:00
Daniel Vetter
f77a2690b4 i915g: rip out ->sw_tiled
It looks like this was meant to facilitate unfenced access to textures/
color/renderbuffers. It's totally incomplete and fundamentally broken
on a few levels:
- broken: The kernel needs to about every tiled bo to fix up bit17
  swizzling on swap-in.
- unflexible: fenced/unfenced relocs from execbuffer2 do the same, much
  simpler.
- unneeded: with relaxed fencing tiled gem bos are as memory-efficient
  as this trick.

Hence kill it.

Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>
2010-11-21 16:41:18 +01:00
Joakim Sindholt
bf10055cff r300g: silence guard band cap errors
Somebody should find out what these are. It can be found on Windows
getting a D3DCAPS9 from IDirect3D9::GetCaps() and reading the
GuardBand* values.
2010-11-21 15:45:20 +01:00
Chia-I Wu
b8f6cb3809 st/vega: Fix vgReadPixels with a subrectangle.
Fix a crash when the subrectangle is not inside the fb.  Fix wrong
pipe transfer when sx > 0 or sy + height != fb->height.

This fixes "readpixels" demo.
2010-11-21 19:32:22 +08:00
Chia-I Wu
e8bbaff22e st/vega: Set wrap_r for mask and blend samplers.
These two samplers use non-normalized texture coordinates.  wrap_r
cannot be PIPE_TEX_WRAP_REPEAT (the default).

This fixes

  sp_tex_sample.c:1790:get_linear_unorm_wrap: Assertion `0' failed

assertion failure.
2010-11-21 19:32:10 +08:00
Chia-I Wu
daa265e53c st/vega: vegaLookupSingle should validate the state.
Fix "lookup" demo crash.
2010-11-21 19:26:33 +08:00
Chia-I Wu
f90524a01b tgsi: Add STENCIL to text parser.
Fix OpenVG "filter" demo

  Program received signal SIGSEGV, Segmentation fault.
  0xb7153dc9 in str_match_no_case (pcur=0xbfffe564, str=0x0) at
  tgsi/tgsi_text.c:86
  86         while (*str != '\0' && *str == uprcase( *cur )) {
2010-11-21 19:26:29 +08:00
Vinson Lee
8bea7776a3 mesa: Clean up header file inclusion in stencil.h. 2010-11-20 22:44:33 -08:00
Vinson Lee
9732a93f40 mesa: Clean up header file inclusion in shared.h. 2010-11-20 22:30:27 -08:00
Vinson Lee
20f041952c mesa: Clean up header file inclusion in shaderapi.h. 2010-11-20 22:17:28 -08:00
Vinson Lee
baa0471597 mesa: Clean up header file inclusion in scissor.h. 2010-11-20 22:01:30 -08:00
Vinson Lee
27e96655c7 mesa: Clean up header file inclusion in renderbuffer.h. 2010-11-20 21:32:07 -08:00
Vinson Lee
b6215d18b5 mesa: Clean up header file inclusion in readpix.h. 2010-11-20 21:23:35 -08:00
Vinson Lee
bab188d22f mesa: Clean up header file inclusion in rastpos.h. 2010-11-20 21:14:06 -08:00
Vinson Lee
9b66305b8d mesa: Clean up header file inclusion in polygon.h. 2010-11-20 21:06:09 -08:00
Vinson Lee
f5cbe04b69 intel: Remove unnecessary header. 2010-11-20 20:13:50 -08:00
Vinson Lee
84f5229119 r600: Remove unnecesary header. 2010-11-20 19:04:30 -08:00
Vinson Lee
b59f3dd8ca swrast: Remove unnecessary header. 2010-11-20 19:00:18 -08:00
Vinson Lee
1310806872 st/mesa: Remove unnecessary headers. 2010-11-20 18:48:09 -08:00
Chia-I Wu
bb045d339b scons: Define IN_DRI_DRIVER.
The define is required for DRI drivers.  It is not needed for
libgl-xlib, but the overhead it introduces should be minor.
2010-11-20 17:47:11 -08:00
Xavier Chantry
7e1bf94631 nvfx: only expose one rt on nv30
We do not know how to use more, GL_ARB_draw_buffers is not exposed on blob.
2010-11-20 23:29:12 +01:00
Owen W. Taylor
c63a86e1e5 r600g: Fix location for clip plane registers
The stride between the different clip plane registers was incorrect.

https://bugs.freedesktop.org/show_bug.cgi?id=31788

agd5f: fix evergreen as well.
2010-11-20 12:18:56 -05:00
Marek Olšák
ffb732d8bd r300g: fix rendering with no vertex elements
Fixes glsl-vs-point-size, although I meant to fix glsl-novertexdata.
Since swrast fails glsl-novertexdata too, I guess it's a core issue.
2010-11-20 16:20:48 +01:00
Eric Anholt
b6b91fa029 i965: Remove duplicate MRF writes in the FS backend.
This is quite common for multitexture sampling, and not only cuts down
on the second and later set of MOVs, but typically also allows
compute-to-MRF on the first set.

No statistically siginficant performance difference in nexuiz (n=3),
but it reduces instruction count in one of its shaders and seems like
a good idea.
2010-11-19 20:05:56 -08:00
Eric Anholt
47b1aac1cf i965: Improve compute-to-mrf.
We were skipping it if the instruction producing the value we were
going to compute-to-mrf used its result reg as a source reg.  This
meant that the typical "write interpolated color to fragment color" or
"texture from interpolated texcoord" shader didn't compute-to-MRF.
Just don't check for the interference cases until after we've checked
if this is the instruction we wanted to compute-to-MRF.

Improves nexuiz high-settings performance on my laptop 0.48% +- 0.08%
(n=3).
2010-11-19 19:54:11 -08:00
Eric Anholt
ac89a90401 ir_to_mesa: Detect and emit MOV_SATs for saturate constructs.
The goal here is to avoid regressing performance on ir_to_mesa drivers
for fixed function fragment shaders requiring saturates.
2010-11-19 19:09:32 -08:00
Eric Anholt
19631fab35 i965: Recognize saturates and turn them into a saturated mov.
On pre-gen6, this turns 4 instructions into 1.  We could still do
better by folding the saturate into the instruction generating the
value if nobody else uses it, but that should be a separate pass.
2010-11-19 19:09:31 -08:00
Eric Anholt
02939d643f glsl: Add a helper function for determining if an rvalue could be a saturate.
Hardware pretty commonly has saturate modifiers on instructions, and
this can be used in codegen to produce those, without everyone else
needing to understand clamping other than min and max.
2010-11-19 19:09:18 -08:00
Eric Anholt
602ae2441a i965: Fold constants into the second arg of BRW_SEL as well.
This hits a common case with min/max operations.
2010-11-19 17:42:07 -08:00
Eric Anholt
f9b420d3bd i965: Remove extra \n at the end of every instruction in INTEL_DEBUG=wm. 2010-11-19 17:42:07 -08:00
Eric Anholt
5944cda6ed i965: Just use memset() to clear most members in FS constructors.
This should make it a lot harder to forget to zero things.
2010-11-19 17:42:07 -08:00
Eric Anholt
61126278a3 i965: Fix compute_to_mrf to not move a MRF write up into another live range.
Fixes glsl-fs-copy-propagation-texcoords-1.
2010-11-19 17:42:06 -08:00
Eric Anholt
6b1d7dd781 mesa: Include C++ files in the makedepend of DRI drivers. 2010-11-19 17:42:06 -08:00
Vinson Lee
a172368ef1 glsl: Fix type of label 'default' in switch statement. 2010-11-19 17:28:22 -08:00
Vinson Lee
7aebe181f3 glsl: Add lower_vector.cpp to SConscript. 2010-11-19 17:23:07 -08:00
Ian Romanick
bb756bb0a6 glsl: Fix matrix constructors with vector parameters
When the semantics of write masks in assignments were changed, this
code was not correctly updated.

Fixes piglit test glsl-mat-from-vec-ctor-01.
2010-11-19 17:17:25 -08:00