Commit graph

167690 commits

Author SHA1 Message Date
Rob Clark
e05abb1345 util: Add a simple no-op libdrm shim
Make it easier to deal with build configs that do not have libdrm.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>
2023-03-05 16:31:51 +00:00
David Heidelberg
b73b701579 ci/freedreno: rare flake KHR-GL45.sample_variables.mask.rgba8i.samples_4.mask_3
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21718>
2023-03-05 14:34:33 +00:00
David Heidelberg
5ee724e180 ci/lavapipe: add recent occasional flake
Issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8441

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21717>
2023-03-05 14:35:45 +01:00
Gert Wollny
9b09f244f0 r600/sfn: Fix atomic lowering
Fixes: 56dedf052f
  r600/sfn: add r600 specific lowering pass for atomics and use it

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
3c3ecdab36 r600/sfn/tests: Add a test for the copy prop into a group
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
244cc152d1 r600/sfn: redirect copy propagation to alu parent group
If an ALU instruction was emitted from the get-go as group, then
we have to make sure that replacing a source doesn't violate the
readport configuration in the group.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
2028465bd8 r600/sfn: Add print method to AluReadportValidation
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
ee0010213f r600/sfn: Add method to AluGroup to replace sources
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
6180721005 r600/sfn: Split AluInstr replace_source into test and actual replace
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Gert Wollny
afa545b926 r600/sfn: Add AluGroup method to update readport validation from scratch
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>
2023-03-05 09:54:08 +00:00
Alyssa Rosenzweig
ed587ae6ac asahi/meta: Use lowered I/O
No point in creating a variable when we can just synthesize the store_output
directly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
485eddcc85 asahi: Bump shader buffers
No reason to limit it, it's direct access anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
c7b5f01461 agx: Only lower int64 late
This is required for address arithmetic to be lowered properly for compute
kernels, which may have u2u64 in the source NIR.

No shader-db changes (for GLES3.0).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
811f8b899d agx: Don't print pre-optimization shader
It's usually too noisy to be useful, especially before DCE. The optimized (but
pre-RA) shader is usually the useful bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
ea37d7f81f agx: Use agx_emit_collect for st_tile
Instead of open coding.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
7bb8112fd1 agx: Refactor vector creation
agx_vec4 is unused, drop in, and split out the common logic since we'll use it
in a new helper.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
037609f1dc agx: Constify agx_print
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
a9c5956f2f agx: Inline 16-bit load/store offsets
Most integer immediates are only 8-bit, but load/store instructions allow their
immediate offsets to be 16-bit instead. Take advantage of this in the optimizer.
This eliminates 36% of the instructions in
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36, a fitting
percentage.

Insignificant effect on dEQP-GLES31.functional.ssbo.* performance... Only a
small % of our compile-time pie is actually spent in the backend anyway (as
opposed to NIR passes or GLSL IR).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
c9728b41d5 agx: Factor out allows_16bit_immediate check
The optimizer needs this information to inline immediates effectively.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
445ca949cd agx: Clean up after lowering address arithmetic
This avoids creating silly preambles that don't actually do anything except push
a constant that we could've inlined for cheaper anyway, since nir_opt_preamble's
cost model is sensitive to e.g. constant folding.

This avoids a pointless preamble in split-hell.

As a nice bonus, this also improves compile-time on address-heavy shaders. With
a release build, CPU time in dEQP-GLES31.functional.ssbo.* reduces from 12.87s
to 10.77... a 16% improvement is nothing to sneeze at.

shader-db results are mostly noise.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
4b1f4b86ea agx: Add AGX_MESA_DEBUG=nopreamble option
Useful both for ruling out issues with shader preambles as well as (in some
cases) making for a nicer reading experience of the compiled assembly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>
2023-03-05 09:27:02 +00:00
Alyssa Rosenzweig
c22a18c9af agx: Don't write sample mask from preambles
It doesn't make sense, they're basically little compute kernel environments.
Noticed while debugging dEQP-GLES31.functional.fbo.no_attachments.multisample.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21710>
2023-03-05 08:20:09 +00:00
Alyssa Rosenzweig
e9f7d14de6 asahi: Mark PIPE_FORMAT_NONE "supported"
Kinda silly but fixes
dEQP-GLES31.functional.state_query.integer.max_framebuffer_samples_* which
queries the number of samples of a NONE format, required for
ARB_framebuffer_no_attachments to make sense.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21710>
2023-03-05 08:20:09 +00:00
Alyssa Rosenzweig
8bb40ce4ad agx: Fix 2D MSAA array texture register allocation
Sample index and layer index are both 16-bits, even though they are zero
extended for compiler simplicity in some cases. In particular this means that 2D
MSAA arrays consume 6 half-regs for their coordinates, not 8. This is what the
IR translation (actually agx_nir_lower_texture) produces, we just need to fix
the calculation in agx_read_registers to agree.

Fixes validation failure in tests like
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_color_2d_array

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21708>
2023-03-05 08:06:43 +00:00
Alyssa Rosenzweig
3032e3ad23 agx: Mask shifts in the backend
This gives our shifts SM5 behaviour at the cost of a little extra ALU. That way,
we match NIR's shifts.

This fixes unsoundness of GLSL expressions like "a << (b & 31)", where the &
would mistakenly get optimized away.

Closes: #8181
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21673>
2023-03-05 07:52:22 +00:00
Alyssa Rosenzweig
f4e2b22646 asahi: Advertise dual-source blending
This is handled entirely in common code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21545>
2023-03-05 07:38:36 +00:00
Yogesh Mohan Marimuthu
af953616a1 wsi/display: check alloc failure in wsi_display_alloc_connector()
vulkancts test dEQP-VK.wsi.direct_drm.surface.create_simulate_oom is failing
because in wsi_display_alloc_connector() function memory allocation for
connector is not checked for return NULL. create_simulate_oom test simulates
out of memory, hence memory allocation fails for connector and later when
tried to dereference connector program will segfault.

This patch fixes the dEQP-VK.wsi.direct_drm.surface.create_simulate_oom test
segfault issue by checking if connector is NULL afer memory allocation.

Cc: mesa-stable
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21701>
2023-03-04 21:20:54 +00:00
Rob Clark
82cc236458 freedreno/a6xx: Fix mirror x/y blits
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>
2023-03-04 19:13:40 +00:00
Rob Clark
ec9e03fb39 freedreno/a6xx: Convert blitter to OUT_REG()
We'll need this to add a7xx support, since some of the regs are
different btwn a6xx and a7xx and reg variants are not supported with
the legacy reg builders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>
2023-03-04 19:13:40 +00:00
Rob Clark
149f2a2e81 freedreno/a6xx: Namespace reg/pkt packer vars
Otherwise they could conflict with parameters to the reg/pkt.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>
2023-03-04 19:13:40 +00:00
Alyssa Rosenzweig
1d2c1b8bd6 pan/mdg: Use nir_lower_helper_writes
It's now in common code, drop our (buggier) copy.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21413>
2023-03-04 13:31:05 -05:00
Alyssa Rosenzweig
586da7b329 nir: Add nir_lower_helper_writes pass
This NIR pass lowers stores in fragment shaders to:

   if (!gl_HelperInvocaton) {
      store();
   }

This implements the API requirement that helper invocations do not have visible
side effects, and the lowering is required on any hardware that cannot directly
mask helper invocation's side effects. The pass was originally written for
Midgard (which has this issue) but is also needed for Asahi. Let's share the
code, and fix it while we're at it.

Changes from the Midgard pass:

1. Add an option to only lower atomics.

   AGX hardware can mask helper invocations for "plain" stores but not for
   atomics.  Accordingly, the AGX compiler wants this lowering for atomics but
   not store_global. By contrast, Midgard cannot mask any stores and needs the
   lowering for all store intrinsics. Add an option to the common pass to
   accommodate both cases.

   This is an optimization for AGX. It is not required for correctness, this
   lowering is always legal.

2. Fix dominance issues.

   It's invalid to have NIR like

      if ... {
         ssa_1 = ...
      }

      foo ssa_1

   Instead we need to rewrite as

      if ... {
         ssa_1 = ...
      } else {
         ssa_2 = undef
      }
      ssa_3 = phi ssa_1, ssa_2

      foo ssa_3

   By default, neither nir_validate nor the backends check this, so this doesn't
   currently fix a (known) real bug. But it's still invalid and fails validation
   with NIR_DEBUG=validate_ssa_dominance.

   Fix this in lower_helper_writes for intrinsics that return data (atomics).

3. Assert that the pass is run only for fragment shaders. This encourages
   backends to be judicious about which passes they call instead of just
   throwing everything in a giant lower everything spaghetti.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21413>
2023-03-04 13:31:05 -05:00
Asahi Lina
1dd872ec17 asahi: Assert on TIB strides > 64
These just don't seem to work. macOS falls back to eMRT here...

dEQP-GLES3.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.13
from Fail -> Crash. Proper solution will come when we implement eMRT later on.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21705>
2023-03-04 10:58:10 -05:00
Rhys Perry
aa32dc704f nir/range_analysis: fix vectorized phis and intrinsics
Found by inspection.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21288>
2023-03-04 12:58:38 +00:00
Eric Engestrom
a19a37e8d7 vk: be stricter about symbols check between android and other platforms
Don't allow HMI on non-Android, don't allow non-HMI on Android, and
don't allow missing HMI on Android.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
2a6fbc4bb2 android/vk: drop unnecessary symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
4e1eb53b5e vn: add linker script to fix android symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
2b1e9b0fd6 anv: add linker script to fix android symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
6f654d532b tu: add linker script to fix android symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
c4e2400461 v3dv: add linker script to fix android symbols
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Eric Engestrom
78578a6ddb vk: move radv's linker symbols scripts for use in all drivers
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
2023-03-04 07:41:10 +00:00
Lionel Landwerlin
938f7a48b2 anv: VK_EXT_image_sliced_view_of_3d
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
2023-03-04 06:12:46 +00:00
Faith Ekstrand
7e1b62ea5b isl: Set Depth to array len for 3D storage images
This is necessary for RESINFO to work properly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
2023-03-04 06:12:46 +00:00
Faith Ekstrand
74e6e207fe intel/blorp: Set array_len for 3D images properly
We need to minify the depth so we don't set a size that's out-of-bounds.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
2023-03-04 06:12:46 +00:00
Lionel Landwerlin
4ee1908ab6 vulkan/runtime: only consider slice info with 3D image views
Because we can have 2D views of 3D images, we want to consider the
slice info only with 3D *image views*.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 66e3ccbcac ("vulkan/runtime: store parameters of VK_EXT_sliced_view_of_3d")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
2023-03-04 06:12:46 +00:00
Faith Ekstrand
3384e4f768 vulkan/runtime: Rename and document storage image Z range
This makes it more clear that the fields specifically apply to the Z
range and aren't array slices.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
2023-03-04 06:12:46 +00:00
Juston Li
464cae9497 venus: shader cache fossilize replay fix
venus utilizes the host side shader cache.

This is a WA to generate shader cache files containing headers with
a unique cache id that will change based on host driver identifiers.
This allows fossilize replay to detect if the host side shader cache
is no longer up to date.
The shader cache is destroyed after creating the necessary files and
not utilized by venus.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21664>
2023-03-04 05:56:04 +00:00
David Heidelberg
60ae5b106f ci/zink: add skip for the Single-GL46.enhanced_layouts.ssb_member_align_non_power_of_2
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>
2023-03-04 04:02:03 +00:00
David Heidelberg
5353fc94e5 ci: Retry, retry, retry... No one likes to trigger Marge more than once.
Sadly, have to decrease retry attempts from 2 to 1 for `runner_system_failure` since it's not doable while keeping one attempt for every other failure.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>
2023-03-04 04:02:03 +00:00
David Heidelberg
d73d383ed2 ci: deqp-runner: drop already unused function
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>
2023-03-04 04:02:03 +00:00